Abstract

The general objective of this Thesis is the study of artificial neural networks (ANN) with hardware implementation focused towards real-time image and video compression. As specific objectives the Thesis pursuits: to explore the feasibility of using ANNs at the different stages of an image compression system; to evaluate the Self Organizing Feature Map (SOM) neural networks with hardware  implementation when they are used for image vector quantization; to analyze the aptitude to real time video processing of an image compression system that mixes ANN based vector quantization with other techniques; and to construct a system to realize the ANN training using hardware-software co-design approach.

The Thesis firstly exposes the image compression fundamentals taking into account both, the theoretical principles and the techniques used to carry out the tasks involved in the compressor stages. After that, there is a survey for the research works where the artificial neural networks are used to image compression.  This task is preceded by a briefly review of the development in the ANN's field.

Regarding its practical section, the Thesis has two parts. At the first one, a SOM neural network is developed to be used as a vector quantizer for image compression. As a departure point, there is an analysis of six architectures that could be used, then the SOM net is designed using the parallel massively SIMD architecture and it is implemented over an FPGA device. Finally the experimentation work is carried out and the results are presented.

In the second one, the SOM net training bench is structured using a hardware-software codesign approach. The SOM neural network is integrated in the bench as a core of a neuro-coprocessor in an FPGA application board. This part concludes with two small research applications to illustrate the bench usability and a major application where a complete image compression system is designed with a mixed wavelet transform-vector quantization scheme.