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A Workload Generator for Evaluating SMT Real-Time Systems

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A Workload Generator for Evaluating SMT Real-Time Systems

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dc.contributor.author Furió Novejarque, Clara es_ES
dc.contributor.author Feliu-Pérez, Josué es_ES
dc.contributor.author Petit Martí, Salvador Vicente es_ES
dc.contributor.author Duro-Gómez, José es_ES
dc.contributor.author Sahuquillo Borrás, Julio es_ES
dc.date.accessioned 2018-11-08T12:01:33Z
dc.date.available 2018-11-08T12:01:33Z
dc.date.issued 2018-07-16 es_ES
dc.identifier.isbn 978-1-5386-7877-0 es_ES
dc.identifier.uri http://hdl.handle.net/10251/112120
dc.description.abstract [EN] Real-time tasks have experience a significant complexity increase in the last years. We can find examples of real-time tasks in nowadays systems that control self-driving cars or multimedia systems, among others. To cope with the high performance requirements of such systems, real-time systems are moving from simple in-order processor to complex out-of-order multicore processors. Furthermore, we expect real-time systems to use simultaneous multithreading (SMT) processors in a near future since these architectures address two key design concerns of embedded systems, that is, they provide higher performance and power efficiency than single-threaded multicores. The main drawback that multicores and SMT architectures present from a real-time perspective is that they implement shared resources. Single-threaded multicores usually share the main memory and the LLC, and SMT processor share additionally most of the microarchitectural core resources. Processes running concurrently can interfere in the shared resources, which increases the performance variability and predictability of these systems. We expect an increasing effort in the next years to mitigate these drawbacks and implement real-time systems with multicore SMT processors. Workload generation is a tedious and time-consuming task in the real-time research field because the workloads dispose of many parameters that should be correctly adjusted to provide flexible and representative workloads. Typically used workload generators, however, fail when designing workloads for theses architectures because they are not aware of the architectural characteristics of SMT systems. In this paper we present the task class-based (TCB) workload generator aimed at providing workloads to evaluate real-time systems with SMT multicore processors in an ease and automatized way. es_ES
dc.format.extent 8
dc.language Inglés
dc.publisher IEEE Computer Society es_ES
dc.relation.ispartof 2018 International Conference on High Performance Computing & Simulation (HPCS)
dc.rights Reserva de todos los derechos
dc.subject Real-time systems es_ES
dc.subject Simultaneous multithreading (SMT) es_ES
dc.subject Workload generator es_ES
dc.title A Workload Generator for Evaluating SMT Real-Time Systems es_ES
dc.type Comunicación en congreso es_ES
dc.identifier.doi 10.1109/HPCS.2018.00067 es_ES
dc.rights.accessRights Embargado
dc.description.bibliographicCitation Furió Novejarque, C.; Feliu-Pérez, J.; Petit Martí, SV.; Duro-Gómez, J.; Sahuquillo Borrás, J. (2018). A Workload Generator for Evaluating SMT Real-Time Systems. IEEE Computer Society. 367-374. doi:10.1109/HPCS.2018.00067 es_ES
dc.description.accrualMethod S es_ES
dc.relation.conferencename International Conference on High Performance Computing & Simulation (HPCS) es_ES
dc.relation.conferencedate July 16-20, 2018
dc.relation.conferenceplace Orléans, France es_ES
dc.relation.publisherversion http://doi.org/10.1109/HPCS.2018.00067
dc.description.upvformatpinicio 367 es_ES
dc.description.upvformatpfin 374 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.relation.pasarela 366791 es_ES


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