Serrano Gómez, Mónica; Sahuquillo Borrás, Julio; Hassan Mohamed, Houcine; Petit Martí, Salvador Vicente; Duato Marín, José Francisco(Springer Verlag (Germany), 2011)
Remote Memory Access (RMA) hardware allow a given motherboard
in a cluster to directly access the memory installed in a remote motherboard of the
same cluster. In recent works, this characteristic has been used to extend ...
Josep Domenech; Sahuquillo Borrás, Julio; Gil Salinas, José Antonio; Pont Sanjuan, Ana(Rinton Press, 2012-03)
[EN] This paper reviews a representative subset of the prediction algorithms used for Web prefetching classifying them according to the information gathered. Then, the DDG algorithm is described. The main novelty of this ...
Serrano Gómez, Mónica; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; Hassan Mohamed, Houcine; Duato Marín, José Francisco(Springer Verlag (Germany), 2012-03)
Cluster computers represent a cost-effective alternative solution to supercomputers. In these systems, it is common to constrain the memory address space of a given processor to the local motherboard. Constraining the ...
Sahuquillo Borrás, Julio; Hassan Mohamed, Houcine; Petit Martí, Salvador Vicente; March Cabrelles, José Luis; Duato Marín, José Francisco(Elsevier, 2016-03)
Nowadays, real-time embedded applications have to cope with an increasing demand of functionalities,
which require increasing processing capabilities. With this aim real-time systems are being implemented
on top of ...
March Cabrelles, José Luis(Universitat Politècnica de València, 2013-06-18)
[ES] Analizar el impacto de permitir que las tareas de tiempo real puedan migrar su ejecución
de un core a otro, sobre el consumo en sistemas empotrados multicore.
March Cabrelles, José Luis; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; Hassan Mohamed, Houcine; Duato Marín, José Francisco(Springer Verlag (Germany), 2011)
Nowadays, a key design issue in embedded systems is how to reduce the power consumption, since batteries have a limited energy budget. For this purpose, several techniques such as Dynamic Voltage Scaling (DVS) or task ...
Selfa-Oliver, Vicent; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; Gómez Requena, María Engracia(Institute of Electrical and Electronics Engineers, 2017)
[EN] Shared caches have become the common design choice in the vast majority of modern multi-core and many-core
processors, since cache sharing improves throughput for a given silicon area. Sharing the cache, however, has ...
Pons-Escat, Lucía; Petit Martí, Salvador Vicente; Pons Terol, Julio; Gómez Requena, María Engracia; Sahuquillo Borrás, Julio(Springer-Verlag, 2023-12-27)
[EN] Research on resource management focuses on optimizing system performance and energy efficiency by distributing shared resources like processor cores, caches, and main memory among competing applications. This research ...
March Cabrelles, José Luis; Sahuquillo Borrás, Julio; Hassan Mohamed, Houcine; Petit Martí, Salvador Vicente; Duato Marín, José Francisco(Oxford University Press (OUP): Policy A - Oxford Open Option A, 2011)
Power consumption is a major design concern in current embedded systems. To deal with consumption, many systems apply dynamic voltage scaling (DVS) techniques which dynamically change the system speed depending on the ...
Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; Selfa Oliver, Vicent; Gómez Requena, María Engracia(IEEE Computer Society, 2015-05)
Multicore processors have become ubiquitous in our real life in devices like smartphones, tablets, etc. In fact, they are present in almost all segments of the computing market, from supercomputers to embedded devices. The ...
Petit Martí, Salvador Vicente; Sahuquillo Borrás, Julio; Gómez Requena, María Engracia; Selfa-Oliver, Vicent(Elsevier, 2017)
[EN] The fast evolution of multicore processors makes it difficult for professors to offer computer architecture courses with updated contents. To deal with this shortcoming that could discourage students, the most appropriate ...
Valero Bresó, Alejandro; Petit Martí, Salvador Vicente; Sahuquillo Borrás, Julio; Kaeli, David R.; Duato Marín, José Francisco(Elsevier, 2015-02)
DRAM technology requires refresh operations to be performed in order to avoid data loss due to capacitance
leakage. Refresh operations consume a significant amount of dynamic energy, which increases
with the storage ...
Ubal Tena, Rafael; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; López Rodríguez, Pedro Juan; Kaeli, David(Institute of Electrical and Electronics Engineers (IEEE), 2012-08)
Out-of-order retirement of instructions has been shown to be an effective technique to increase the number of in-flight instructions. This form of runtime scheduling can reduce pipeline stalls caused by head-of-line blocking ...
Domenech, Josep; De La Ossa Perez, Bernardo Antonio; Sahuquillo Borrás, Julio; Gil Salinas, José Antonio; Pont Sanjuan, Ana(Elsevier, 2012-07)
Web prefetching techniques are an attractive solution to reduce the user-perceived latency. These techniques are driven by a prediction engine or algorithm that guesses following actions of web users. A large amount of ...
Furió Novejarque, Clara; Feliu-Pérez, Josué; Petit Martí, Salvador Vicente; Duro-Gómez, José; Sahuquillo Borrás, Julio(IEEE Computer Society, 2018-07-16)
[EN] Real-time tasks have experience a significant complexity increase in the last years. We can find examples of real-time tasks in nowadays systems that control self-driving cars or multimedia systems, among others. To ...
Peña Ortiz, Raúl(Editorial Universitat Politècnica de València, 2013-02-13)
Las nuevas aplicaciones y servicios web, cada vez má¡s populares en nuestro día a día, han cambiado completamente la forma en la que los usuarios interactúan con la Web.
En menos de media década, el papel que juegan los ...
Puche Lara, José; Lechago Buendía, Sergio; Petit Martí, Salvador Vicente; Gómez Requena, María Engracia; Sahuquillo Borrás, Julio(IEEE, 2016)
Photonic interconnects are a promising solution for the so-called communication bottleneck in current Chip Multiprocessor (CMPs) architectures. This technology presents an inherent low-latency and power consumption almost ...
Candel-Margaix, Francisco; Petit Martí, Salvador Vicente; Sahuquillo Borrás, Julio; Duato Marín, José Francisco(Elsevier, 2018-05)
[EN] Research on GPU architecture is becoming pervasive in both the academia and the industry because these architectures offer much more performance per watt than typical CPU architectures. This is the main reason why ...
Selfa Oliver, Vicent(Universitat Politècnica de València, 2016-01-08)
[EN] Current multicore systems implement various hardware prefetchers since prefetching can significantly
hide the huge main memory latencies. However, memory bandwidth is a scarce resource which
becomes critical with ...
Selfa Oliver, Vicent(Universitat Politècnica de València, 2018-11-13)
El acceso a la memoria principal en los procesadores actuales supone un importante cuello de botella para las prestaciones, dado que los diferentes núcleos compiten por el limitado ancho de banda de memoria, agravando la ...