Bermúdez Garzón, Diego Fernando; Gómez Requena, Crispín; Gómez Requena, María Engracia; López Rodríguez, Pedro Juan; Duato Marín, José Francisco(Institute of Electrical and Electronics Engineers (IEEE), 2016-04)
On the one hand, performance and fault-tolerance of interconnection networks are key design issues for high performance computing (HPC) systems. On the other hand, cost should be also considered. Indirect topologies are ...
Gómez Requena, Crispín; Gilabert Villamón, Francisco; Gómez Requena, María Engracia; López Rodríguez, Pedro Juan; Duato Marín, José Francisco(Springer Verlag (Germany), 2015-07)
Large cluster-based machines require efficient high-performance interconnection networks. Routing is a key design issue of interconnection networks. Adaptive routing usually outperforms deterministic routing at the expense ...
Selfa Oliver, Vicent(Universitat Politècnica de València, 2016-01-08)
[EN] Current multicore systems implement various hardware prefetchers since prefetching can significantly
hide the huge main memory latencies. However, memory bandwidth is a scarce resource which
becomes critical with ...
The architecture of current processors has experienced great changes in the last years, leading to sophisticated multithreaded multicore processors. The inherent complexity of such processors makes difficult to update ...
Navarro Alfonso, Paula(Universitat Politècnica de València, 2013-09-30)
El objetivo de este trabajo es diseñar técnicas eficientes aplicables al controlador
de memoria para reducir este tiempo de acceso. Asumiremos que el sistema
base ya implementa técnicas de prebúsqueda, que es una técnica ...
[EN] Current multicore systems implement multiple hardware prefetchers to tolerate long main memory latencies. However, memory bandwidth is a scarce shared resource which becomes critical with the increasing core count. ...
Gómez Requena, Crispín(Universitat Politècnica de València, 2010-11-08)
Actualmente, los clústeres de PCs están considerados como una alternativa eficiente a la hora de construir supercomputadores en los que miles de nodos de computación se conectan mediante una red de interconexión. La red ...
Selfa Oliver, Vicent(Universitat Politècnica de València, 2013-09-30)
El propósito de este proyecto es diseñar y evaluar mediante simulación un mecanismo
dinámico de activación y desactivación de la prebúsqueda de manera independiente
para cada uno de los núcleos del microprocesador. Todo ...
Bermúdez Garzón, Diego Fernando; Gómez Requena, Crispín; López Rodríguez, Pedro Juan; Gómez Requena, María Engracia(IEEE, 2015-07-20)
Analyzing the fault-tolerance of interconnection
networks implies checking the connectivity of each sourcedestination
pair. The size of the exploration space of such
operation skyrockets with the network size and with ...
Peñaranda Cebrián, Roberto; Gómez Requena, Crispín; Gómez Requena, María Engracia; López Rodríguez, Pedro Juan; Duato Marín, José Francisco(Springer Verlag (Germany), 2016-03)
In large-scale supercomputers, the interconnection network plays a key role in system performance. Network topology highly defines the performance and cost of the interconnection network. Direct topologies are sometimes ...
Peñaranda Cebrián, Roberto(Universitat Politècnica de València, 2013-06-17)
[ES] En los grandes super-computadores, la topología de la red de interconexión es un aspecto clave de diseño que impacta a las prestaciones y el coste de todo el sistema. Las topologías directas proporcionan un coste ...
Peñaranda Cebrián, Roberto; Gómez Requena, Crispín; Gómez Requena, María Engracia; López Rodríguez, Pedro Juan(Elsevier, 2017)
[EN] Routing is a key design parameter in the interconnection network of large parallel computers. Routing algorithms are classified into two different categories depending on the number of routing options available for ...