Ubal Tena, Rafael; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; López Rodríguez, Pedro Juan; Kaeli, David(Institute of Electrical and Electronics Engineers (IEEE), 2012-08)
Out-of-order retirement of instructions has been shown to be an effective technique to increase the number of in-flight instructions. This form of runtime scheduling can reduce pipeline stalls caused by head-of-line blocking ...
Petit Martí, Salvador Vicente; Ubal Tena, Rafael; Sahuquillo Borrás, Julio; López Rodríguez, Pedro Juan(Institute of Electrical and Electronics Engineers (IEEE), 2014-07)
Modern superscalar processors implement register
renaming using either random access memory (RAM) or
content-addressable memories (CAM) tables. The design of these
structures should address both access time and ...
Ubal Tena, Rafael; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; López Rodríguez, Pedro Juan; Duato Marín, José Francisco(Institute of Electrical and Electronics Engineers (IEEE), 2013-05)
Multicore chips are currently dominating the microprocessor market as designs that improve performance and sustain power consumption. However, complex core features must be still considered to provide good performance for ...
Ubal Tena, Rafael(Universitat Politècnica de València, 2010-09-01)
Los procesadores superescalares actuales utilizan un reorder buffer (ROB) para contabilizar las instrucciones en vuelo. El ROB se implementa como una cola FIFO first in first out en la que las instrucciones se insertan en ...