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Listar por autor "Tornero Gavilá, Rafael"

Mostrando ítems 1-7 de 7

Adaptation of High Performance and High Capacity Reconfigurable Systems to OpenCL Programming Environments

Russo, Davide (Universitat Politècnica de València, 2020-09-18)

[EN] In this work, we adapt a reconfigurable computer system based on FPGA technologies to OpenCL programming environments. The reconfigurable system is part of a compute prototype of the MANGO European project that ...
Diseño de un interfaz de programación en OpenCL para clusters de alto rendimiento basados en sistemas multi-FPGA

Rodríguez Agut, David (Universitat Politècnica de València, 2020-09-28)

[ES] En este TFM se va a diseñar un interfaz de programación para clusters de alto rendimiento basados en sistemas FPGA interconectados entre si. El cluster está formado por FPGAs de diferente tecnología y utiliza memorias ...
From a FPGA Prototyping Platform to a Computing Platform: The MANGO Experience

Flich Cardo, José; Tornero-Gavilá, Rafael; Rodríguez, D.; Russo, D.; Martínez Martínez, José María; Hernández Luz, Carles (IEEE, 2021-02-05)

[EN] In this paper we describe the evolution of the FPGA-based prototype deployed in the MANGO project, from a hardware prototyping platform of HPC architectures to a computing platform targeting HPC and AI applications. ...
HLS Kernel Execution on a MultiFPGA Prototype

Nuzzo, Rosa (Universitat Politècnica de València, 2021-10-18)

[ES] El objetivo de este proyecto es permitir el uso de un prototipo multiFPGA como plataforma de cálculo en la que se puedan ejecutar simultáneamente núcleos FPGA codificados en síntesis de alto nivel. El proyecto se ...
Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives

Canal, Ramon; Hernández Luz, Carles; Tornero-Gavilá, Rafael; Cilardo, Alessandro; Massari, Giuseppe; Reghenzani, Federico; Fornaciari, William; Zapater, Marina; Atienza, David; Oleksiak, Ariel; Piatek, Wojciech; Abella, Jaume (Association for Computing Machinery, 2020-10)

[EN] Performance and power constraints come together with Complementary Metal Oxide Semiconductor technology scaling in future Exascale systems. Technology scaling makes each individual transistor more prone to faults and, ...
The RECIPE approach to challenges in deeply heterogeneous high performance systems

Agosta, Giovanni; Fornaciari, William; Atienza, David; Canal, Ramon; Cilardo, Alessandro; Flich Cardo, José; Hernández Luz, Carles; Kulczewski, Michal; Massari, Giuseppe; Tornero-Gavilá, Rafael; Zapater, Marina (Elsevier, 2020-09)

[EN] RECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted at exploring ...
Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms

Rodríguez-Agut, David; Tornero-Gavilá, Rafael; Flich Cardo, José (IEEE, 2023-04-19)

[EN] Nowadays, convolutional neural networks (CNN) are common in a wide range of applications. Their high accuracy and efficiency contrast with their computing requirements, leading to the search for efficient hardware ...