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Listar por autor "Real Sáez, Jorge Vicente"

Mostrando ítems 1-13 de 13

A hierarchical architecture for time- and event-triggered real-time systems

Real Sáez, Jorge Vicente; Sáez Barona, Sergio; Crespo, Alfons (Elsevier, 2019-12)

[EN] This paper proposes an architecture for combining the execution of time- and event-triggered real-time task sets. This makes it possible for the designer to choose the most appropriate mechanism depending on the role ...
Adding multiprocessor and mode change support to the Ada real-time framework

Sáez Barona, Sergio; Real Sáez, Jorge Vicente; Crespo Lorente, Alfons (Association for Computing Machinery (ACM), 2013-04)

[EN] Based on a previous proposal of an Ada 2005 framework of real-time utilities, this paper deals with the extension of that framework to include support for multiprocessor platforms and multiple operating modes and ...
An Integrated Framework for Multiprocessor, Multimoded Real-Time Applications

Sáez Barona, Sergio; Real Sáez, Jorge Vicente; Crespo, Alfons (Springer, 2012)

In this paper we propose an approach for building real-time systems under a combination of requirements: specification and handling of operating modes and mode changes; implementation on top of a multiprocessor platform; ...
Circuito adaptador entre tarjeta de E/S digitales y dispositivos electromecánicos

Lliso Gallent, Vicente (2022-06-15)

[ES] En base a la adaptación a las E/S del PC de los actuadores (motores de corriente continua) y de los sensores (conmutadores) de este último dispositivo, se diseña el circuito adaptador objeto del presente trabajo fin ...
Combined Scheduling of Time-Triggered Plans and Priority Scheduled Task Sets

Real Sáez, Jorge Vicente; Sáez Barona, Sergio; Crespo Lorente, Alfons (Association for Computing Machinery (ACM), 2016-06-01)

[EN] Preemptive, priority-based scheduling on the one hand, and time-triggered scheduling on the other, are the two major techniques in use for development of real-time and embedded software. Both have their advantages ...
Combining Time-Triggered Plans with Priority Scheduled Task Sets

Real Sáez, Jorge Vicente; Sáez Barona, Sergio; Crespo, Alfons (Springer, 2016)

Time-triggered and concurrent priority-based scheduling are the two major approaches in use for real-time and embedded systems. Both approaches have their own advantages and drawbacks. On the one hand, priority-based ...
Deferred and atomic setting of scheduling attributes for ada

Sáez Barona, Sergio; Real Sáez, Jorge Vicente; Crespo, Alfons (Association for Computing Machinery (ACM), 2013)

Deferred setting of scheduling attributes refers to a single operation that sets a new value for a scheduling attribute of a task at some future time. Although deferred setting of scheduling attributes is possible in Ada ...
Implementation of Timing-Event Affinities in Ada/Linux

Sáez Barona, Sergio; Real Sáez, Jorge Vicente; Crespo Lorente, Alfons (Association for Computing Machinery (ACM), 2015-04)

Ada 2012 has introduced mechanisms for exploiting multiprocessor platforms at the application level. These include task affinity control and definition of dispatching domains. However, there are other executable entities ...
Ravenscar Support for Time-Triggered Scheduling

Real Sáez, Jorge Vicente; Sáez Barona, Sergio; Crespo, Alfons (Association for Computing Machinery, 2018)

[EN] This position paper follows from a previous proposal to integrate a time-triggered scheduler in a prioritybased, preemptive scheduler such as that supported by Ada¿s task dispatching policy FIFO Within Priorities . ...
Reliable Handling of Real-Time Scheduling Attributes on Multiprocessor Platforms in Ada 2012

Sáez Barona, Sergio; Real Sáez, Jorge Vicente; Crespo, Alfons (Springer, 2014)

The real-time attributes of a concurrent task define the parameters that will determine when the task can be allocated the required resources. Typical examples are the task s priority, the deadline, and the CPU (or CPUs) ...
Session summary: Language abstractions

Wellings, Andy; Real Sáez, Jorge Vicente (Association for Computing Machinery (ACM), 2015-04)

Summary of discussion and conclusions of the IRTAW group around language abstractions.
Session summary: Multirprocessor Issues Part 1

Real Sáez, Jorge Vicente; Ruiz, José F. (Association for Computing Machinery (ACM), 2013-04)

The topic of multiprocessors was addressed by quite a number of position papers this year, so the whole first day of the IRTAW 15 workshop, while we were all fresh, was allocated to discussing multiprocessor issues. There ...
Session summary: Open Issues

Real Sáez, Jorge Vicente; De la Puente, Juan Antonio (Association for Computing Machinery (ACM), 2013-08)

Most of the session was focused on discussing the opportunity to define a new Ada profile by adding execution-time control mechanisms to the Ravenscar profile. The basis for the proposal was the position papers by ...