Buscar en RiuNet

Listar

Todo RiuNet

Mi cuenta

Acceder

Ayuda RiuNet

Admin. UPV

Listar por autor "Picornell Sanjuan, Tomás"

Mostrando ítems 1-6 de 6

Conflict-Free Networks on Chip for Real Time Systems

Picornell Sanjuan, Tomás (Universitat Politècnica de València, 2021-11-22)

[ES] La constante necesidad de un mayor rendimiento para cumplir con la gran demanda de potencia de cómputo de las nuevas aplicaciones, (ej. sistemas de conducción autónoma), obliga a la industria a apostar por la tecnología ...
Desarrollo de un Procesador de Altas Prestaciones para una Arquitectura Multinúcleo en FPGA #2

Picornell Sanjuan, Tomás (Universitat Politècnica de València, 2015-07-31)

[ES] En este trabajo se diseña e implementa un procesador con ejecución fuera de orden siguiendo como modelo el algoritmo de Tomasulo. El procesador es reconfigurable y permite tanto la instanciación de un número variable ...
Diseño e implementación de soporte de calidad de servicio en arquitecturas multinúcleo

Picornell Sanjuan, Tomás (Universitat Politècnica de València, 2016-07-25)

[EN] Networks on chip play a vital rol in application domains when QoS must be assured. Multicore systems, when running applications, need to guarantee certain levels of bandwidths and latency bounds for packet transmissions. ...
Enforcing Predictability of Many-cores with DCFNoC

Picornell-Sanjuan, Tomás; Flich Cardo, José; Hernández Luz, Carles; Duato Marín, José Francisco (Institute of Electrical and Electronics Engineers, 2021-02-01)

[EN] The ever need for higher performance forces industry to include technology based on multi-processors system on chip (MPSoCs) in their safety-critical embedded systems. MPSoCs include a network-on-chip (NoC) to ...
HP-DCFNoC: High Performance Distributed Dynamic TDM Scheduler Based on DCFNoC Theory

Picornell-Sanjuan, Tomás; Flich Cardo, José; Duato Marín, José Francisco; Hernández Luz, Carles (Institute of Electrical and Electronics Engineers, 2020)

[EN] The need for increasing the performance of critical real-time embedded systems pushes the industry to adopt complex multi-core processor designs with embedded networks-on-chip. In this paper we present hp-DCFNoC, a ...
Improving the Robustness of Redundant Execution with Register File Randomization

Tuzov, Ilya; Andreu, Pablo; Medina, Laura; Picornell-Sanjuan, Tomás; Robles Martínez, Antonio; López Rodríguez, Pedro Juan; Flich Cardo, José; Hernández Luz, Carles (IEEE, 2021-11-04)

[EN] Staggered Redundant execution (SRE) is a fault-tolerance mechanism that has been widely deployed in the context of safety-critical applications. SRE not only protects the system in the presence of faults but also helps ...