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Listar por autor "Lacruz Jucht, Jesús Omar"

RiuNet: Repositorio Institucional de la Universidad Politécnica de Valencia

Listar por autor "Lacruz Jucht, Jesús Omar"

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    A 630 Mbps non-binary decoder for FPGA 
    Lacruz Jucht, Jesús Omar; García Herrero, Francisco Miguel; Canet Subiela, Mª José; Valls Coquillat, Javier; Pérez Pascual, Mª Asunción (IEEE, 2015-07)
    A high-speed non-binary LDPC decoder based on Trellis Min-Max algorithm with layered schedule is presented. The proposed approach compresses the check-node output messages into a reduced set, decreasing the number of ...
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    Decodificador de códigos LDPC no binarios basado en el algoritmo T-EMS 
    Lacruz Jucht, Jesús Omar (Universitat Politècnica de València, 2014-11-24)
    [EN] In this work a non-binary LDPC decoder based on T-EMS algorithm is proposed. A full parallel architecture of the check node has been implemented and a layered schedule is used for the decoder. The proposed decoder has ...
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    Reduction of Complexity for Nonbinary LDPC Decoders With Compressed Messages 
    Lacruz Jucht, Jesús Omar; García Herrero, Francisco Miguel; Valls Coquillat, Javier (Institute of Electrical and Electronics Engineers (IEEE), 2015-11)
    In this brief, a method for compressing the messages between check nodes and variable nodes is proposed. This method is named compressed nonbinary message passing (CNBMP). CNBMP reduces the number of messages exchanged ...
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    Simplified trellis min-max decoder architecture for nonbinary low-density parity-check codes 
    Lacruz Jucht, Jesús Omar; García Herrero, Francisco Miguel; Declercq, David; Valls Coquillat, Javier (Institute of Electrical and Electronics Engineers (IEEE), 2015-09)
    Nonbinary low-density parity-check (NB-LDPC) codes have become an efficient alternative to their binary counterparts in different scenarios, such as moderate codeword lengths, high-order modulations, and burst error ...
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    VLSI algorithms and architectures for non-binary-LDPC decoding 
    Lacruz Jucht, Jesús Omar (Universitat Politècnica de València, 2016-11-04)
    [EN] This thesis studies the design of low-complexity soft-decision Non-Binary Low-Density Parity-Check (NB-LDPC) decoding algorithms and their corresponding hardware architectures suitable for decoding high-rate codes at ...