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Listar por autor "Naithani, Ajeya"

RiuNet: Repositorio Institucional de la Universidad Politécnica de Valencia

Listar por autor "Naithani, Ajeya"

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    Precise Runahead Execution 
    Naithani, Ajeya; Feliu-Pérez, Josué; Adileh, Almutaz; Eeckhout, Lieven (Institute of Electrical and Electronics Engineers, 2019-06)
    [EN] Runahead execution improves processor performance by accurately prefetching long-latency memory accesses. When a long-latency load causes the instruction window to fill up and halt the pipeline, the processor enters ...
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    The Forward Slice Core: A High-Performance, Yet Low-Complexity Microarchitecture 
    Lakshminarasimhan, Kartik; Naithani, Ajeya; Feliu-Pérez, Josué; Eeckhout, Lieven (Association for Computing Machinery, 2022-06)
    [EN] Superscalar out-of-order cores deliver high performance at the cost of increased complexity and power budget. In-order cores, in contrast, are less complex and have a smaller power budget, but offer low performance. ...
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    VMT: Virtualized Multi-Threading for Accelerating Graph Workloads on Commodity Processors 
    Feliu-Pérez, Josué; Naithani, Ajeya; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; Qureshi, Moinuddin; Eeckhout, Lieven (Institute of Electrical and Electronics Engineers, 2022-06-01)
    [EN] Modern-day graph workloads operate on huge graphs through pointer chasing which leads to high last-level cache (LLC) miss rates and limited memory-level parallelism (MLP). Simultaneous Multi-Threading (SMT) effectively ...