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Listar por palabra clave "3D Stacking"

RiuNet: Repositorio Institucional de la Universidad Politécnica de Valencia

Listar por palabra clave "3D Stacking"

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    Fault-tolerant vertical link design for effective 3D stacking 
    Hernández Luz, Carles; Roca Pérez, Antoni; Flich Cardo, José; Silla Jiménez, Federico; Duato Marín, José Francisco (Institute of Electrical and Electronics Engineers (IEEE), 2011-12)
    [EN] Recently, 3D stacking has been proposed to alleviate the memory bandwidth limitation arising in chip multiprocessors (CMPs). As the number of integrated cores in the chip increases the access to external memory becomes ...