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Listar por palabra clave "Contention-aware scheduling"

RiuNet: Repositorio Institucional de la Universidad Politécnica de Valencia

Listar por palabra clave "Contention-aware scheduling"

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    Cache-Hierarchy contention-aware scheduling in CMPs 
    Feliu Pérez, Josué; Petit Martí, Salvador Vicente; Sahuquillo Borrás, Julio; Duato Marín, José Francisco (Institute of Electrical and Electronics Engineers (IEEE), 2014-03)
    To improve chip multiprocessor (CMP) performance, recent research has focused on scheduling strategies to mitigate main memory bandwidth contention. Nowadays, commercial CMPs implement multilevel cache hierarchies that are ...