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Listar por palabra clave "Interconnection networks"

Mostrando ítems 1-14 de 14

A survey and evaluation of topology-agnostic deterministic routing algorithms

Flich Cardo, José; Skeie, . Tor; Mejia, Andres; Lysne, . Olav; López Rodríguez, Pedro Juan; Robles Martínez, Antonio; Duato Marín, José Francisco; Koibuchi, . Michihiro; Rokicki, . Tomas; Sancho, . Jose Carlos (Institute of Electrical and Electronics Engineers (IEEE), 2012)

Most standard cluster interconnect technologies are flexible with respect to network topology. This has spawned a substantial amount of research on topology-agnostic routing algorithms, which make no assumption about the ...
Cost-effective queue schemes for reducing head-of-line blocking in fat-trees

Escudero, Jesús; García García, Pedro Javier; Quiles Flor, Francisco Jose; Flich Cardo, José; Duato Marín, José Francisco (Wiley-Blackwell, 2011)

The fat-tree is one of the most common topologies among the interconnection networks of the systems currently used for high-performance parallel computing. Among other advantages, fat-trees allow the use of simple but very ...
Efficient and Cost-Effective Hybrid Congestion Control for HPC Interconnection Networks

Escudero Sahuquillo, Jesús; Gran, Ernst Gunnar; Garcia Garcia, Pedro-Javier; Flich Cardo, José; Skeie, Tor; Lysne, Olav; Quiles Flor, Francisco Jose; Duato Marín, José Francisco (Institute of Electrical and Electronics Engineers (IEEE), 2015-01)

Interconnection networks are key components in high-performance computing (HPC) systems, their performance having a strong influence on the overall system one. However, at high load, congestion and its negative effects ...
Efficient mechanisms to provide fault tolerance in interconnection networks for pc clusters

Montañana Aliaga, José Miguel (Universitat Politècnica de València, 2008-07-21)

Actualmente, los clusters de PC son un alternativa rentable a los computadores paralelos. En estos sistemas, miles de componentes (procesadores y/o discos duros) se conectan a través de redes de interconexión de altas ...
Energy efficient HPC network topologies with on/off links

Andújar-Muñoz, Francisco José; Coll, Salvador; Alonso Díaz, Marina; Martínez-Rubio, Juan-Miguel; López Rodríguez, Pedro Juan; Sánchez García, José Luis; Alfaro Cortés, Francisco José (Elsevier, 2023-02-01)

[EN] Energy efficiency is a must in today HPC systems. To achieve this goal, a holistic design based on the use of power-aware components should be performed. One of the key components of an HPC system is the high-speed ...
Energy efficient torus networks with on/off links

Andújar, Francisco J.; Coll, Salvador; Alonso Díaz, Marina; Martínez-Rubio, Juan-Miguel; López Rodríguez, Pedro Juan; Sánchez, José L.; Alfaro, Francisco J.; Martínez, Raúl (Elsevier, 2019-08)

[EN] Future exascale computing systems will require energy and performance efficient interconnection networks to respond to the high data movement demands of new applications, such as those coming from big-data and artificial ...
Modeling and Analysis of the Performance of Exascale Photonic Networks

Duro-Gómez, José; Pascual Pérez, José Antonio; Petit Martí, Salvador Vicente; Sahuquillo Borrás, Julio; Gómez Requena, María Engracia (John Wiley & Sons, 2019-11-10)

[EN] Photonics technology has become a promising and viable alternative for both on-chip and off-chip interconnection networks of future Exascale systems. Nevertheless, this technology is not mature enough yet in this ...
OBQA: Smart and cost-efficient queue scheme for Head-of-Line blocking elimination in fat-trees

Escudero, Jesús; García, Pedro J.; Quiles, Francisco J.; Flich Cardo, José; Duato Marín, José Francisco (Elsevier, 2011-11)

High-speed interconnection networks are essential elements for different high-performance parallel-computing systems. One of the most common interconnection network topologies is the fat-tree, whose advantages have turned ...
Photonic Interconnection Networks for Exascale Computers

Duro Gómez, José (Universitat Politècnica de València, 2021-05-24)

[ES] En los últimos años, distintos proyectos alrededor del mundo se han centrado en el diseño de supercomputadores capaces de alcanzar la meta de la computación a exascala, con el objetivo de soportar la ejecución de ...
POWAR: Power-Aware Routing in HPC Networks with On/Off Links

Andújar-Muñoz, Francisco José; Coll, Salvador; Alonso Díaz, Marina; López Rodríguez, Pedro Juan; Martínez-Rubio, Juan-Miguel (Association for Computing Machinery, 2019-01)

[EN] In order to save energy in HPC interconnection networks, one usual proposal is to switch idle links into a low-power mode after a certain time without any transmission, as IEEE Energy Efficient Ethernet standard ...
Progressive congestion management based on packet marking and validation techniques

Ferrer Pérez, Joan Lluís; Baydal Cardona, María Elvira; Robles Martínez, Antonio; López Rodríguez, Pedro Juan; Duato Marín, José Francisco (Institute of Electrical and Electronics Engineers (IEEE), 2012-09)

Congestion management in multistage interconnection networks is a serious problem, which is not solved completely. In order to avoid the degradation of network performance when congestion appears, several congestion ...
Segment Switching: A New Switching Strategy for Optical HPC Networks

Duro, José; Petit Martí, Salvador Vicente; Gómez Requena, María Engracia; Sahuquillo Borrás, Julio (Institute of Electrical and Electronics Engineers, 2021)

[EN] Photonics are becoming realistic technologies for implementing interconnection networks in near future Exascale supercomputer systems. Photonics present key features to design high-performance and scalable supercomputer ...
The k-ary n-direct s-indirect family of topologies for large-scale interconnection networks

Peñaranda Cebrián, Roberto; Gómez Requena, Crispín; Gómez Requena, María Engracia; López Rodríguez, Pedro Juan; Duato Marín, José Francisco (Springer Verlag (Germany), 2016-03)

In large-scale supercomputers, the interconnection network plays a key role in system performance. Network topology highly defines the performance and cost of the interconnection network. Direct topologies are sometimes ...
UPR: deadlock-free dynamic network reconfiguration by exploiting channel dependency graph compatibility

Crespo, Juan-José; Sánchez, José L.; Alfaro-Cortés, Francisco J.; Méndez-Rodríguez, E; Flich Cardo, José; Duato, José (Springer-Verlag, 2021-11)

[EN] Deadlock-free dynamic network reconfiguration process is usually studied from the routing algorithm restrictions and resource reservation perspective. The dynamic nature yielded by the transition process from one ...