Ubal Tena, Rafael; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; López Rodríguez, Pedro Juan; Kaeli, David(Institute of Electrical and Electronics Engineers (IEEE), 2012-08)
Out-of-order retirement of instructions has been shown to be an effective technique to increase the number of in-flight instructions. This form of runtime scheduling can reduce pipeline stalls caused by head-of-line blocking ...
Carratalá Sáez, Rocío(Universitat Politècnica de València, 2016-09-02)
[EN] Hierarchical matrices are a numerical tool for representing, in a sparse way and in a linear-logarithmic storage cost, dense problems that arise in integral and partial differential equations. For some basic linear ...
The architecture of current processors has experienced great changes in the last years, leading to sophisticated multithreaded multicore processors. The inherent complexity of such processors makes difficult to update ...
Pons Escat, Lucía; Selfa Oliver, Vicent; Sahuquillo Borrás, Julio; Petit Martí, Salvador Vicente; Pons Terol, Julio(Universitat Politècnica de València, 2020-05-14)
CPA is LLC (Last Level Cache) partitioning approach that performs an efficient cache space distribution among executing applications. To assign partitions (ways) of the LLC, Intel CAT is used. This policy is included in a ...
Lurbe Sempere, Manel(Universitat Politècnica de València, 2020-09-28)
[ES] Los procesadores de altas prestaciones más modernos integran prefetchers hardware muy complejos, en los que seleccionar la configuración para que éste obtenga las mejores prestaciones se convierte en una tarea compleja. ...
Francisco Almenar; Domínguez Montagud, Carlos Pascual; Hassan Mohamed, Houcine; Martínez Rubio, Juan Miguel; López Rodríguez, Pedro Juan(Elsevier, 2016-03)
Control architectures based on emotions are becoming promising solutions for the implementation of
future robotic systems. The basic controllers of this architecture are the emotional processes that decide
which behaviors ...
[EN] Near Threshold Voltage (NTV) computing has been recently proposed as a technique to save energy, at the cost of incurring higher error rates including, among others, Silent Data Corruption (SDC). In this paper, we ...
Navarro Edo, Marta(Universitat Politècnica de València, 2021-09-15)
[ES] Los procesadores multihilo simultáneo están dominando el mercado de la computación
de altas prestaciones. Entre estos procesadores, los que soportan solos dos hilos
(SMT2) están siendo los más implantados en los ...
[EN] We address the parallelization of the LU factorization of hierarchical matrices (H-matrices) arising from boundary element methods. Our approach exploits task-parallelism via the OmpSs programming model and runtime, ...
Aliaga, Jose I.; Alonso Jordá, Pedro; Badía Contelles, José Manuel; Chacon, Pablo; Davidovic, Davo; Lopez-Blanco, Jose R.; Quintana-Orti, Enrique S(Elsevier, 2016-03-15)
We introduce a new iterative Krylov subspace-based eigensolver for the simulation of
macromolecular motions on desktop multithreaded platforms equipped with multicore
processors and, possibly, a graphics accelerator ...
[EN] We introduce a version of the epistasis test in FaST-LMM for clusters of multithreaded processors. This new software maintains the sensitivity of the original FaST-LMM while delivering acceleration that is close to ...
Pons Escat, Lucía(Universitat Politècnica de València, 2019-07-30)
[ES] La memoria caché de último nivel (LLC) desempeña un papel clave en el rendimiento final del sistema en los procesadores multinúcleo actuales al reducir significativamente la cantidad de accesos a memoria principal. ...
Pons Escat, Lucía(Universitat Politècnica de València, 2018-09-06)
[ES] La compartición de recursos tiene un gran impacto en las prestaciones de los procesadores
multinúcleo actuales. Entre los recursos compartidos del sistema, la memoria caché
de último nivel o Last Level Cache (LLC) ...
Alonso Jordá, Pedro; Dolz Zaragozá, Manuel Francisco; Mayo, Rafael; Quintana Ortí, Enrique Salvador(Wiley, 2014-12)
[EN] In this paper, we propose a model for the energy consumption of the concurrent execution of three key dense matrix factorizations, with task parallelism leveraged via the Symmetric Multi-Processing Superscalar (SMPSs) ...
[EN] In this paper we introduce a model for the total energy consumption of the Cholesky factorization on a multicore processor. Our model assumes a task- parallel execution of the factorization process, with con- currency ...
Control architectures based on Emotions are becoming promising solutions for the implementation of future robotic agents. The basic controllers of the architecture are the emotional processes that decide which behaviors ...
Dolz Zaragozá, Manuel Francisco(Universitat Politècnica de València, 2011-09-06)
Desde años, el principal objetivo de la computación de altas prestaciones ha sido la optimización de algoritmos
aplicados a la resolución de problemas complejos que, constantemente, aparecen en un amplio abanico ...
Navarro Edo, Marta(Universitat Politècnica de València, 2020-09-16)
[ES] La mayoría de los procesadores utilizados en los servidores de los centros de cómputo
de altas prestaciones disponen de núcleos que soportan la ejecución de múltiples hilos al
mismo tiempo. Se trata de núcleos ...
[EN] Power consumption in current high-performance chip multiprocessors (CMPs) has become a major design concern that aggravates with the current trend of increasing the core count. A significant fraction of the total power ...
[EN] With the memory bandwidth of current computer architectures being significantly slower than the (floating point) arithmetic performance, many scientific computations only leverage a fraction of the computational power ...