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Listar por palabra clave "Network-on-Chip"

RiuNet: Repositorio Institucional de la Universidad Politécnica de Valencia

Listar por palabra clave "Network-on-Chip"

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    A Brief Comment on "A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs" 
    Bishnoi, Rimpy; Laxmi, Vijay; Gaur, Manoj Singh; Flich Cardo, José; Trivino, Francisco (Association for Computing Machinery (ACM), 2015-01)
    [EN] In the Ghiribaldi et al. [2013] paper, a complete self-testing and self configuring NoC infrastructure for cost-effective MPSoCs was presented in order to make NoC architecture tolerant to faults. To overcome the ...
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    A complete self-testing and self-configuring NoC infrastructure for cost-effective MPSoCs 
    Ghiribaldi, Alberto; Ludovici, Daniele; Triviño, Francisco; Strano, Alessandro; Flich Cardo, José; Sanchez Garcia, Jose Luis; Alfaro, Francisco; Favalli, Michelle; Bertozzi, Davide (Association for Computing Machinery (ACM), 2013-06)
    [EN] Networks-on-chip need to survive to manufacturing faults in order to sustain yield. An effective testing and configuration strategy however implies two opposite requirements. One one hand, a fast and scalable ...
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    Improving Network-on-Chip Performance in Multi-Core Systems 
    Gorgues Alonso, Miguel (Universitat Politècnica de València, 2018-09-10)
    La red en el chip (NoC) se han convertido en el elemento clave para la comunicación eficiente entre los núcleos dentro de los chip multiprocesador (CMP). Tanto el uso de aplicaciones paralelas en los CMPs como el incremento ...
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    Network-on-Chip Virtualization in Chip-Multiprocessor Systems 
    Triviño, Francisco; Sanchez Garcia, Jose Luis; Alfaro, Francisco J.; Flich Cardo, José (Elsevier, 2012-03)
    [EN] It is expected that Chip Multiprocessor Systems (CMPs) will contain more and more cores in every new generation. However, applications for these systems do not scale at the same pace. In order to obtain a good CMP ...