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Hierarchical approach for deriving a reproducible unblocked LU factorization

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Hierarchical approach for deriving a reproducible unblocked LU factorization

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dc.contributor.author Iakymchuk, Roman es_ES
dc.contributor.author Graillat, Stef es_ES
dc.contributor.author Defour, David es_ES
dc.contributor.author Quintana-Orti, Enrique S. es_ES
dc.date.accessioned 2020-09-24T12:30:16Z
dc.date.available 2020-09-24T12:30:16Z
dc.date.issued 2019-09 es_ES
dc.identifier.issn 1094-3420 es_ES
dc.identifier.uri http://hdl.handle.net/10251/150674
dc.description.abstract [EN] We propose a reproducible variant of the unblocked LU factorization for graphics processor units (GPUs). For this purpose, we build upon Level-1/2 BLAS kernels that deliver correctly-rounded and reproducible results for the dot (inner) product, vector scaling, and the matrix-vector product. In addition, we draw a strategy to enhance the accuracy of the triangular solve via iterative refinement. Following a bottom-up approach, we finally construct a reproducible unblocked implementation of the LU factorization for GPUs, which accommodates partial pivoting for stability and can be eventually integrated in a high performance and stable algorithm for the (blocked) LU factorization. es_ES
dc.description.sponsorship The author(s) disclosed receipt of the following financial support for the research, authorship, and/or publication of this article: The simulations were performed on resources provided by the Swed-ish National Infrastructure for Computing (SNIC) at PDC Centre for High Performance Computing (PDC-HPC). This work was also granted access to the HPC resources of The Institute for Scientific Computing and Simulation financed by Region Ile-de-France and the project Equip@Meso (reference ANR-10-EQPX-29-01) overseen by the French National Agency for Research (ANR) as part of the Investissements d Avenir pro-gram. This work was also partly supported by the FastRelax (ANR-14-CE25-0018-01) project of ANR. es_ES
dc.language Inglés es_ES
dc.publisher SAGE Publications es_ES
dc.relation.ispartof International Journal of High Performance Computing Applications es_ES
dc.rights Reserva de todos los derechos es_ES
dc.subject LU factorization es_ES
dc.subject BLAS es_ES
dc.subject Reproducibility es_ES
dc.subject Accuracy es_ES
dc.subject Long accumulator es_ES
dc.subject Error-free transformation es_ES
dc.subject GPUs es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title Hierarchical approach for deriving a reproducible unblocked LU factorization es_ES
dc.type Artículo es_ES
dc.identifier.doi 10.1177/1094342019832968 es_ES
dc.relation.projectID info:eu-repo/grantAgreement/ANR//ANR-10-EQPX-0029/FR/Equipement d'excellence de calcul intensif de Mesocentres coordonnés - Tremplin vers le calcul petaflopique et l'exascale/EQUIP@MESO/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/ANR//ANR-14-CE25-0018/FR/Fast Reliable Approximation/Fast Relax/ es_ES
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.description.bibliographicCitation Iakymchuk, R.; Graillat, S.; Defour, D.; Quintana-Orti, ES. (2019). Hierarchical approach for deriving a reproducible unblocked LU factorization. International Journal of High Performance Computing Applications. 33(5):791-803. https://doi.org/10.1177/1094342019832968 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion https://doi.org/10.1177/1094342019832968 es_ES
dc.description.upvformatpinicio 791 es_ES
dc.description.upvformatpfin 803 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 33 es_ES
dc.description.issue 5 es_ES
dc.relation.pasarela S\392811 es_ES
dc.contributor.funder Region Ile-de-France es_ES
dc.contributor.funder Agence Nationale de la Recherche, Francia es_ES
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