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The Tag Filter Architecture: An energy-efficient cache and directory design

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The Tag Filter Architecture: An energy-efficient cache and directory design

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Valls, J.; Ros Bardisa, A.; Gómez Requena, ME.; Sahuquillo Borrás, J. (2017). The Tag Filter Architecture: An energy-efficient cache and directory design. Journal of Parallel and Distributed Computing. 100:193-202. doi:10.1016/j.jpdc.2016.04.016

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/101903

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Title: The Tag Filter Architecture: An energy-efficient cache and directory design
Author: Valls, Joan Ros Bardisa, Alberto Gómez Requena, María Engracia Sahuquillo Borrás, Julio
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Embargo end date: 2019-02-01
Abstract:
[EN] Power consumption in current high-performance chip multiprocessors (CMPs) has become a major design concern that aggravates with the current trend of increasing the core count. A significant fraction of the total power ...[+]
Subjects: Multicore processors , Cache , Directory , Dynamic consumption
Copyrigths: Reserva de todos los derechos
Source:
Journal of Parallel and Distributed Computing. (issn: 0743-7315 )
DOI: 10.1016/j.jpdc.2016.04.016
Publisher:
Elsevier
Publisher version: https://doi.org/10.1016/j.jpdc.2016.04.016
Thanks:
This work has been jointly supported by MINECO and European Commission (FEDER funds) under the project TIN2015-66972-C5-1-R/3-R and by Fundación Séneca, Agencia de Ciencia y Tecnología de la Región de Murcia under the ...[+]
Type: Artículo

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