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Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores

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Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores

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Feliu-Pérez, J.; Sahuquillo Borrás, J.; Petit Martí, SV.; Duato Marín, JF. (2017). Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores. IEEE Transactions on Computers. 66(5):905-911. doi:10.1109/TC.2016.2620977

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/102499

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Title: Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
[EN] Nowadays, high performance multicore processors implement multithreading capabilities. The processes running concurrently on these processors are continuously competing for the shared resources, not only among cores, ...[+]
Subjects: Scheduling , Fairness , SMT , Multicore , Performance estimation
Copyrigths: Reserva de todos los derechos
Source:
IEEE Transactions on Computers. (issn: 0018-9340 )
DOI: 10.1109/TC.2016.2620977
Publisher:
Institute of Electrical and Electronics Engineers
Publisher version: http://doi.org/10.1109/TC.2016.2620977
Thanks:
We thank the anonymous reviewers for their constructive and insightful feedback. This work was supported in part by the Spanish Ministerio de Economia y Competitividad (MINECO) and Plan E funds, under grants TIN2015-66972-C5-1-R ...[+]
Type: Artículo

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