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dc.contributor.author | Torres Carot, Vicente | es_ES |
dc.contributor.author | Valls Coquillat, Javier | es_ES |
dc.contributor.author | Canet Subiela, Mª José | es_ES |
dc.date.accessioned | 2018-09-27T04:31:39Z | |
dc.date.available | 2018-09-27T04:31:39Z | |
dc.date.issued | 2017 | es_ES |
dc.identifier.issn | 0013-5194 | es_ES |
dc.identifier.uri | http://hdl.handle.net/10251/108350 | |
dc.description | This paper is a postprint of a paper submitted to and accepted for publication in Electronics Letters and is subject to Institution of Engineering and Technology Copyright. The copy of record is available at IET Digital Library | |
dc.description.abstract | [EN] A method for the implementation of the atan2 operator based on the coordinate rotation digital computer algorithm is described. In the proposal, the computation of the z-path takes advantage of the look-up table-based FPGA resources to reduce by between 17 and 25%, without performance deterioration, the overall area of the unrolled architecture. | es_ES |
dc.description.sponsorship | This work was funded by the Spanish Ministerio de Economia y Competitividad and FEDER under the grant TEC2015-70858-C2-2-R. | es_ES |
dc.language | Inglés | es_ES |
dc.publisher | Institution of Electrical Engineers | es_ES |
dc.relation.ispartof | Electronics Letters | es_ES |
dc.rights | Reserva de todos los derechos | es_ES |
dc.subject | Field programmable gate arrays | es_ES |
dc.subject | Digital arithmetic | es_ES |
dc.subject | Table lookup | es_ES |
dc.subject | Optimised CORDIC-based atan2 computation | es_ES |
dc.subject | Atan2 operator | es_ES |
dc.subject | Coordinate rotation digital computer algorithm | es_ES |
dc.subject | Z-path computation | es_ES |
dc.subject | Look-up table-based FPGA resources | es_ES |
dc.subject.classification | TECNOLOGIA ELECTRONICA | es_ES |
dc.title | Optimised CORDIC-based atan2 computation for FPGA implementations | es_ES |
dc.type | Artículo | es_ES |
dc.identifier.doi | 10.1049/el.2017.2090 | es_ES |
dc.relation.projectID | info:eu-repo/grantAgreement/MINECO//TEC2015-70858-C2-2-R/ES/TRATAMIENTO DIGITAL DE LA SEÑAL Y CORRECCION DE ERRORES EN TRANSMISION OPTICA MEDIANTE FIBRA MULTI-NUCLEO PARA REDES OPTICAS DE ACCESO Y DE TRANSPORTE CELULAR/ | es_ES |
dc.rights.accessRights | Abierto | es_ES |
dc.contributor.affiliation | Universitat Politècnica de València. Departamento de Ingeniería Electrónica - Departament d'Enginyeria Electrònica | es_ES |
dc.description.bibliographicCitation | Torres Carot, V.; Valls Coquillat, J.; Canet Subiela, MJ. (2017). Optimised CORDIC-based atan2 computation for FPGA implementations. Electronics Letters. 53(19):1296-1298. https://doi.org/10.1049/el.2017.2090 | es_ES |
dc.description.accrualMethod | S | es_ES |
dc.relation.publisherversion | http://doi.org/10.1049/el.2017.2090 | es_ES |
dc.description.upvformatpinicio | 1296 | es_ES |
dc.description.upvformatpfin | 1298 | es_ES |
dc.type.version | info:eu-repo/semantics/publishedVersion | es_ES |
dc.description.volume | 53 | es_ES |
dc.description.issue | 19 | es_ES |
dc.relation.pasarela | S\348604 | es_ES |
dc.contributor.funder | Ministerio de Economía, Industria y Competitividad | es_ES |