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Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors

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Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors

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dc.contributor.author Catalán, Sandra es_ES
dc.contributor.author Herrero, José R. es_ES
dc.contributor.author Igual Peña, Francisco Daniel es_ES
dc.contributor.author Rodríguez-Sánchez, Rafael es_ES
dc.contributor.author Quintana Ortí, Enrique Salvador es_ES
dc.contributor.author Adeniyi-Jones, Chris es_ES
dc.date.accessioned 2020-07-08T03:31:54Z
dc.date.available 2020-07-08T03:31:54Z
dc.date.issued 2018-03 es_ES
dc.identifier.issn 1877-7503 es_ES
dc.identifier.uri http://hdl.handle.net/10251/147617
dc.description.abstract [EN] Dense linear algebra libraries, such as BLAS and LAPACK, provide a relevant collection of numerical tools for many scientific and engineering applications. While there exist high performance implementations of the BLAS (and LAPACK) functionality for many current multi-threaded architectures, the adaption of these libraries for asymmetric multicore processors (AMPs) is still pending. In this paper we address this challenge by developing an asymmetry-aware implementation of the BLAS, based on the BLIS framework, and tailored for AMPs equipped with two types of cores: fast/power-hungry versus slow/energy-efficient. For this purpose, we integrate coarse-grain and fine-grain parallelization strategies into the library routines which, respectively, dynamically distribute the workload between the two core types and statically repartition this work among the cores of the same type. Our results on an ARM (R) big.LITTLE (TM) processor embedded in the Exynos 5422 SoC, using the asymmetry-aware version of the BLAS and a plain migration of the legacy version of LAPACK, experimentally assess the benefits, limitations, and potential of this approach from the perspectives of both throughput and energy efficiency. (C) 2016 Elsevier B.V. All rights reserved. es_ES
dc.description.sponsorship The researchers from Universidad Jaume I were supported by projects CICYT TIN2011-23283 and TIN2014-53495-R of MINECO and FEDER, and the FPU program of MECD. The researcher from Universidad Complutense de Madrid was supported by project CICYT TIN2015-65277-R. The researcher from Universitat Politecnica de Catalunya was supported by projects TIN2015-65316-P from the Spanish Ministry of Education and 2014 SGR 1051 from the Generalitat de Catalunya, Dep. dinnovacio, Universitats i Empresa. es_ES
dc.language Inglés es_ES
dc.publisher Elsevier es_ES
dc.relation.ispartof Journal of Computational Science es_ES
dc.rights Reconocimiento - No comercial - Sin obra derivada (by-nc-nd) es_ES
dc.subject Dense linear algebra es_ES
dc.subject BLAS es_ES
dc.subject LAPACK es_ES
dc.subject Asymmetric multicore processors es_ES
dc.subject Multi-threading es_ES
dc.subject High performance computing es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors es_ES
dc.type Artículo es_ES
dc.identifier.doi 10.1016/j.jocs.2016.10.020 es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2014-53495-R/ES/COMPUTACION HETEROGENEA DE BAJO CONSUMO/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/Generalitat de Catalunya//2014 SGR 1051/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MICINN//TIN2011-23283/ES/POWER-AWARE HIGH PERFORMANCE COMPUTING/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2015-65277-R/ES/COMPPUTACION HETEROGENEA EFICIENTE: DEL PROCESADOR AL DATACENTER/ es_ES
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.description.bibliographicCitation Catalán, S.; Herrero, JR.; Igual Peña, FD.; Rodríguez-Sánchez, R.; Quintana Ortí, ES.; Adeniyi-Jones, C. (2018). Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors. Journal of Computational Science. 25:140-151. https://doi.org/10.1016/j.jocs.2016.10.020 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion https://doi.org/10.1016/j.jocs.2016.10.020 es_ES
dc.description.upvformatpinicio 140 es_ES
dc.description.upvformatpfin 151 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 25 es_ES
dc.relation.pasarela S\380788 es_ES
dc.contributor.funder Generalitat de Catalunya es_ES
dc.contributor.funder European Regional Development Fund es_ES
dc.contributor.funder Ministerio de Economía y Competitividad es_ES
dc.contributor.funder Ministerio de Educación, Cultura y Deporte es_ES
dc.contributor.funder Ministerio de Ciencia e Innovación es_ES


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