- -

Silicon nitride programmable photonic processor with folded heaters

RiuNet: Repositorio Institucional de la Universidad Politécnica de Valencia

Compartir/Enviar a

Citas

Estadísticas

  • Estadisticas de Uso

Silicon nitride programmable photonic processor with folded heaters

Mostrar el registro sencillo del ítem

Ficheros en el ítem

dc.contributor.author Pérez-López, Daniel es_ES
dc.contributor.author Gutiérrez, Ana es_ES
dc.contributor.author Capmany Francoy, José es_ES
dc.date.accessioned 2023-09-27T18:02:09Z
dc.date.available 2023-09-27T18:02:09Z
dc.date.issued 2021-03-15 es_ES
dc.identifier.issn 1094-4087 es_ES
dc.identifier.uri http://hdl.handle.net/10251/197252
dc.description.abstract [EN] General-purpose programmable photonic processors rely on the large-scale integration of beamsplitters and reconfigurable phase shifters, distributed within unit cells or photonic gates. With their future evolution threatened by several hardware constrains, including the integration density that can be achieved with current mesh topologies, in this work, we present a unit cell topology design to increase the integration density of waveguide mesh arrangements based on folded Mach-Zehnder Interferometers. We report the design details of a 40-unit cell waveguide mesh integrated in a 11 mm x 5.5 mm silicon nitride chip achieving, to the best of our knowledge, the highest integration density reported to date for a general-purpose photonic processor. The chip is electrically interfaced to a PCB and we report examples of reconfigurable optical beamsplitters, basic tunable microwave photonic filters with high peak rejection (40 dB approx.), as well as the dynamic interconnection and routing of 5G digitally modulated signals within the photonic mesh. (C) 2021 Optical Society of America under the terms of the OSA Open Access Publishing Agreement es_ES
dc.description.sponsorship European Cooperation in Science and Technology (CA 16220 EUIMWP); Generalitat Valenciana (PROMETEO 2017/017); Ministerio de Economia, Industria y Competitividad, Gobierno de Espana (Juan de la Cierva); European Research Council (ERC ADG-2016 UMWP-Chip, ERC-POC-2019 FPPAs). es_ES
dc.language Inglés es_ES
dc.publisher The Optical Society es_ES
dc.relation.ispartof Optics Express es_ES
dc.rights Reconocimiento (by) es_ES
dc.subject.classification TEORÍA DE LA SEÑAL Y COMUNICACIONES es_ES
dc.title Silicon nitride programmable photonic processor with folded heaters es_ES
dc.type Artículo es_ES
dc.identifier.doi 10.1364/OE.416053 es_ES
dc.relation.projectID info:eu-repo/grantAgreement/ERC//ERC ADG-2016 UMWP-Chip/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/ERC//ERC-POC-2019 FPPAs/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/GVA//PROMETEO%2F2017%2F017/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/COST//CA16220//European Network for High Performance Integrated Microwave Photonics/ es_ES
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Escuela Técnica Superior de Ingenieros de Telecomunicación - Escola Tècnica Superior d'Enginyers de Telecomunicació es_ES
dc.description.bibliographicCitation Pérez-López, D.; Gutiérrez, A.; Capmany Francoy, J. (2021). Silicon nitride programmable photonic processor with folded heaters. Optics Express. 29(6):9043-9059. https://doi.org/10.1364/OE.416053 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion https://doi.org/10.1364/OE.416053 es_ES
dc.description.upvformatpinicio 9043 es_ES
dc.description.upvformatpfin 9059 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 29 es_ES
dc.description.issue 6 es_ES
dc.relation.pasarela S\499849 es_ES
dc.contributor.funder Generalitat Valenciana es_ES
dc.contributor.funder European Research Council es_ES
dc.contributor.funder European Cooperation in Science and Technology es_ES
upv.costeAPC 2614 es_ES


Este ítem aparece en la(s) siguiente(s) colección(ones)

Mostrar el registro sencillo del ítem