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Switch-based packing technique to reduce traffic and latency in token coherence

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Switch-based packing technique to reduce traffic and latency in token coherence

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Cuesta Sáez, BA.; Robles Martínez, A.; Duato Marín, JF. (2012). Switch-based packing technique to reduce traffic and latency in token coherence. Journal of Parallel and Distributed Computing. 72(3):409-423. doi:10.1016/j.jpdc.2011.11.010

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/37223

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Title: Switch-based packing technique to reduce traffic and latency in token coherence
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
Token Coherence is a cache coherence protocol able to simultaneously capture the best attributes of traditional protocols: low latency and scalability. However it may lose these desired features when (1) several nodes ...[+]
Subjects: Cache coherence protocol , Combining switches , Message packing , Scalability , Token coherence , Traffic reduction , Bandwidth requirement , Packing techniques
Copyrigths: Reserva de todos los derechos
Source:
Journal of Parallel and Distributed Computing. (issn: 0743-7315 )
DOI: 10.1016/j.jpdc.2011.11.010
Publisher:
Elsevier
Publisher version: http://dx.doi.org/10.1016/j.jpdc.2011.11.010
Thanks:
This work was partially supported by the Spanish MEC and MICINN, as well as European Commission FEDER funds, under Grants CSD2006-00046 and TIN2009-14475-C04-01.
Type: Artículo

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