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Effective power saving method by on-chip traffic compression in noc-based embedded systems

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Effective power saving method by on-chip traffic compression in noc-based embedded systems

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Soler Heredia, M. (2013). Effective power saving method by on-chip traffic compression in noc-based embedded systems. http://hdl.handle.net/10251/43774

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Title: Effective power saving method by on-chip traffic compression in noc-based embedded systems
Author: Soler Heredia, María
Director(s): Flich Cardo, José
UPV Unit: Universitat Politècnica de València. Servicio de Alumnado - Servei d'Alumnat
Read date / Event date:
2013-07-12
Issued date:
Abstract:
[EN] of components, relying on an efficient on-chip network (network-on-chip; NoC). As the size of the system increases, NoC performance and power consumption become a central issue. In this project, we design compression ...[+]


[ES] Con los avances de la tecnología, los sistemas en chip multiprocesador (MPSoC) aumentan en número de componentes, apoyándose en una red en el chip (NoC) eficiente. Según crece el tamaño de estos sistemas, la eficiencia ...[+]
Subjects: Redes en chip , Compresión , Ahorro de energía , Network-on-Chip (NoC) , Compression , Power efficiency
Copyrigths: Reserva de todos los derechos
Publisher:
Universitat Politècnica de València
degree: Máster Universitario en Ingeniería de Computadores-Màster Universitari en Enginyeria de Computadors
Type: Tesis de máster

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