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PS-Architecture: A scalable and energy-efficient architecture for CMP NUCAs

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PS-Architecture: A scalable and energy-efficient architecture for CMP NUCAs

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Valls Mompó, JJ. (2013). PS-Architecture: A scalable and energy-efficient architecture for CMP NUCAs. http://hdl.handle.net/10251/44383

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Title: PS-Architecture: A scalable and energy-efficient architecture for CMP NUCAs
Author:
Director(s): Sahuquillo Borrás, Julio Gómez Requena, María Engracia
UPV Unit: Universitat Politècnica de València. Servicio de Alumnado - Servei d'Alumnat
Read date / Event date:
2013-07-12
Issued date:
Abstract:
As the number of cores increases in both incoming and future shared-memory chip--multiprocessor (CMP) generations, coherence protocols and all elements in the cache hierarchy must scale to sustain performance. In this work ...[+]
Subjects: Cache , Directory , CMP
Copyrigths: Reconocimiento - No comercial - Sin obra derivada (by-nc-nd)
degree: Máster Universitario en Ingeniería de Computadores-Màster Universitari en Enginyeria de Computadors
Type: Tesis de máster

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