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Efficient routing in heterogeneous SoC designs with small implementation overhead

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Efficient routing in heterogeneous SoC designs with small implementation overhead

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Cano Reyes, J.; Flich Cardo, J.; Roca Pérez, A.; Duato Marín, JF.; Coppola, M.; Locatelli, R. (2014). Efficient routing in heterogeneous SoC designs with small implementation overhead. IEEE Transactions on Computers. 63(3):557-569. doi:10.1109/TC.2012.299

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/51034

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Title: Efficient routing in heterogeneous SoC designs with small implementation overhead
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
In application-specific SoCs, the irregularity of the topology ends up in a complex and customized implementation of the routing algorithm, usually relying on routing tables implemented with memory structures at source end ...[+]
Subjects: Systems-on-chip , Networks-on-chip , Routing , Evaluation , Network topology , Algorithm design and analysis
Copyrigths: Reserva de todos los derechos
Source:
IEEE Transactions on Computers. (issn: 0018-9340 )
DOI: 10.1109/TC.2012.299
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Publisher version: http://dx.doi.org/10.1109/TC.2012.299
Thanks:
This work was supported by the Spanish MEC and MICINN, as well as European Commission FEDER funds, under Grant CSD2006-00046. It was also partly supported by the COMCAS project (CA501), a project labeled within the framework ...[+]
Type: Artículo

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