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Cache architectures based on heterogeneous technologies to deal with manufacturing errors

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Lorente Garcés, VJ. (2015). Cache architectures based on heterogeneous technologies to deal with manufacturing errors [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/58428

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Title: Cache architectures based on heterogeneous technologies to deal with manufacturing errors
Author: Lorente Garcés, Vicente Jesús
Director(s): Petit Martí, Salvador Vicente Sahuquillo Borrás, Julio
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Read date / Event date:
2015-11-16
Issued date:
Abstract:
[EN] SRAM technology has traditionally been used to implement processor caches since it is the fastest existing RAM technology.However,one of the major drawbacks of this technology is its high energy consumption.To reduce ...[+]


[ES] La tecnología SRAM se ha utilizado tradicionalmente para implementar las memorias cache debido a que es la tecnología de memoria RAM más rápida existente.Por contra,uno de los principales inconvenientes de esta ...[+]


[CAT] La tecnologia SRAM s'ha utilitzat tradicionalment per a implementar les memòries cau degut a que és la tecnologia de memòria RAM més ràpida existent.Per contra, un dels principals inconvenients d'aquesta tecnologia ...[+]
Subjects: Cache , Memory , Fault-Tolerant cache , SRAM , DRAM , EDRAM , Memory cell , Process variation , Low-Power , Performance , Area , Leakage , Energy
Copyrigths: Reserva de todos los derechos
DOI: 10.4995/Thesis/10251/58428
Type: Tesis doctoral

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