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An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems

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An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems

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dc.contributor.author Andrés Martínez, David de es_ES
dc.contributor.author Ruiz García, Juan Carlos es_ES
dc.contributor.author Espinosa García, Jaime es_ES
dc.contributor.author Gil Vicente, Pedro Joaquín es_ES
dc.contributor.editor IGI Publishing es_ES
dc.date.accessioned 2016-02-11T13:15:28Z
dc.date.available 2016-02-11T13:15:28Z
dc.date.issued 2014
dc.identifier.isbn 978-1-4666-6194-3
dc.identifier.uri http://hdl.handle.net/10251/60809
dc.description.abstract The steady reduction of transistor size has brought embedded solutions into everyday life. However, the same features of deep-submicron technologies that are increasing the application spectrum of these solutions are also negatively affecting their dependability. Current practices for the design and deployment of hardware fault tolerance and security strategies remain in practice specific (defined on a case-per-case basis) and mostly manual and error prone. Aspect orientation, which already promotes a clear separation between functional and non-functional (dependability and security) concerns in software designs, is also an approach with a big potential at the hardware level. This chapter addresses the challenging problems of engineering such strategies in a generic way via metaprogramming, and supporting their subsequent instantiation and deployment on specific hardware designs through open compilation. This shows that promoting a clear separation of concerns in hardware designs and producing a library of generic, but reusable, hardware fault and intrusion tolerance mechanisms is a feasible reality today. es_ES
dc.language Español es_ES
dc.relation.ispartof Handbook of Research on Embedded Systems Design es_ES
dc.rights Reserva de todos los derechos es_ES
dc.subject.classification INGENIERIA DE SISTEMAS Y AUTOMATICA es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems es_ES
dc.type Capítulo de libro es_ES
dc.identifier.doi 10.4018/978-1-4666-6194-3 es_ES
dc.rights.accessRights Cerrado es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Ingeniería de Sistemas y Automática - Departament d'Enginyeria de Sistemes i Automàtica es_ES
dc.contributor.affiliation Universitat Politècnica de València. Instituto Universitario de Aplicaciones de las Tecnologías de la Información - Institut Universitari d'Aplicacions de les Tecnologies de la Informació es_ES
dc.description.bibliographicCitation Andrés Martínez, DD.; Ruiz García, JC.; Espinosa García, J.; Gil Vicente, PJ. (2014). An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems. En Handbook of Research on Embedded Systems Design. 123-149. doi:10.4018/978-1-4666-6194-3 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion http://dx.doi.org/10.4018/978-1-4666-6194-3 es_ES
dc.description.upvformatpinicio 123 es_ES
dc.description.upvformatpfin 149 es_ES
dc.relation.senia 285627 es_ES


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