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Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases

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Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases

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Rodrigues De Lima, E. (2016). Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases [Tesis doctoral no publicada]. Universitat Politècnica de València. doi:10.4995/Thesis/10251/61967.

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/61967

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Title: Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases
Author:
Director(s): Almenar Terré, Vicenç Flores Asenjo, Santiago José
UPV Unit: Universitat Politècnica de València. Departamento de Comunicaciones - Departament de Comunicacions
Read date / Event date:
2016-01-21
Issued date:
Abstract:
[EN] The first generation of Terrestrial Digital Television(DTV) has been in service for over a decade. In 2013, several countries have already completed the transition from Analog to Digital TV Broadcasting, most of which ...[+]


[ES] La primera generación de Televisión Digital Terrestre(DTV) ha estado en servicio por más de una década. En 2013, varios países completaron la transición de transmisión analógica a televisión digital, la mayoría de ...[+]


[CAT] La primera generació de Televisió Digital Terrestre (TDT) ha estat en servici durant més d'una dècada. En 2013, diversos països ja van completar la transició de la radiodifusió de televisió analògica a la digital, i ...[+]
Subjects: Digital Television , Digital Receivers , OFDM , Digital Signal Processing , Synchronization , Integrated Circuits Design , ASIC , FPGA , DTTV , Satellite Receivers , DVB-S2 , ISDB-T , ISDB-Tb , Wireless , Equalization , Adaptive Equalization
Copyrigths: Reserva de todos los derechos
DOI: 10.4995/Thesis/10251/61967
Type: Tesis doctoral

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