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Understanding cache hierarchy contention in CMPs to improve job scheduling

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Understanding cache hierarchy contention in CMPs to improve job scheduling

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Feliu Pérez, J.; Sahuquillo Borrás, J.; Petit Martí, SV.; Duato Marín, JF. (2012). Understanding cache hierarchy contention in CMPs to improve job scheduling. IEEE. doi:10.1109/IPDPS.2012.54

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/67537

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Title: Understanding cache hierarchy contention in CMPs to improve job scheduling
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
In order to improve CMP performance, recent research has focused on scheduling to mitigate contention produced by the limited memory bandwidth. Nowadays, commercial CMPs implement multi-level cache hierarchies where last ...[+]
Subjects: Memory-aware scheduling , Contention-points , Shared caches , Cache hierarchy
Copyrigths: Reserva de todos los derechos
ISBN: 978-0-7695-4675-9
Source:
(issn: 1530-2075 )
DOI: 10.1109/IPDPS.2012.54
Publisher:
IEEE
Publisher version: http://dx.doi.org/10.1109/IPDPS.2012.54
Conference name: 26th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2012)
Conference place: Shanghai, China
Conference date: May 21-25, 2012
Description: © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Type: Comunicación en congreso

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