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Speeding Up Algorithmic Debugging Using Balanced Execution Trees

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Speeding Up Algorithmic Debugging Using Balanced Execution Trees

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dc.contributor.author Silva, Josep es_ES
dc.contributor.author Insa Cabrera, David es_ES
dc.contributor.author Riesco, Adrián es_ES
dc.date.accessioned 2016-10-25T11:17:40Z
dc.date.available 2016-10-25T11:17:40Z
dc.date.issued 2013-06-18
dc.identifier.isbn 978-3-642-38915-3
dc.identifier.issn 0302-9743
dc.identifier.uri http://hdl.handle.net/10251/72733
dc.description.abstract Algorithmic debugging is a debugging technique that uses a data structure representing all computations performed during the execution of a program. This data structure is the so-called Execution Tree and it strongly influences the performance of the technique. In this work we present a transformation that automatically improves the structure of the execution trees by collapsing and projecting some strategic nodes. This improvement in the structure implies a better behavior and performance of the standard algorithms that traverse it. We prove that the transformation is sound in the sense that all the bugs found after the transformation are real bugs; and if at least one bug is detectable before the transformation, then at least one bug will also be detectable after the transformation. We have implemented the technique and performed several experiments with real applications. The experimental results confirm the usefulness of the technique. es_ES
dc.description.sponsorship This work has been partially supported by the Spanish Ministerio de Ciencia e Innovación under grants TIN2008-06622-C03-02 and TIN2012-39391-004-04, by the Generalitat Valenciana under grant ACOMP/2009/017, and by the Comunidad de Madrid under grant S2009/TIC-1465. David Insa has been partially supported by the Spanish Ministerio de Educación under grant AP2010-4415. es_ES
dc.language Inglés es_ES
dc.publisher Springer es_ES
dc.relation.ispartof Tests and Proofs es_ES
dc.relation.ispartofseries Lecture Notes in Computer Science;7942
dc.rights Reserva de todos los derechos es_ES
dc.subject.classification LENGUAJES Y SISTEMAS INFORMATICOS es_ES
dc.title Speeding Up Algorithmic Debugging Using Balanced Execution Trees es_ES
dc.type Capítulo de libro es_ES
dc.type Comunicación en congreso es_ES
dc.identifier.doi 10.1007/978-3-642-38916-0_8
dc.relation.projectID info:eu-repo/grantAgreement/MICINN//TIN2008-06622-C03-02/ES/VERIFICACION Y DEPURACION AGILES ORIENTADAS A MEJORAR LA SEGURIDAD DEL SOFTWARE/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2012-39391-C04-04/ES/TECNOLOGIAS RIGUROSAS PARA SOFTWARE DE NUEVA GENERACION ABIERTO Y FIABLE/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MICINN//TIN2012-39391-004-04/ES/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/Generalitat Valenciana//ACOMP%2F2009%2F017/ES/VERIFICACION Y DEPURACION AGILES ORIENTADAS A MEJORAR LA SEGURIDAD DEL SOFTWARE/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/Gobierno de la Comunidad de Madrid//S2009%2FTIC-1465/ES/Métodos rigurosos de desarrollo de sofwtare de la Comunidad de Madrid/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MECD//AP2010-4415/ES/AP2010-4415/ es_ES
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Sistemas Informáticos y Computación - Departament de Sistemes Informàtics i Computació es_ES
dc.contributor.affiliation Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica es_ES
dc.description.bibliographicCitation Silva, J.; Insa Cabrera, D.; Riesco, A. (2013). Speeding Up Algorithmic Debugging Using Balanced Execution Trees. En Tests and Proofs. Springer. 133-151. https://doi.org/10.1007/978-3-642-38916-0_8 es_ES
dc.description.accrualMethod S es_ES
dc.relation.conferencename 7th International Conference on Tests and Proofs (TAP 2013) es_ES
dc.relation.conferencedate June 16-20, 2013 es_ES
dc.relation.conferenceplace Budapest, Hungary es_ES
dc.relation.publisherversion http://link.springer.com/book/10.1007/978-3-642-38916-0 es_ES
dc.description.upvformatpinicio 133 es_ES
dc.description.upvformatpfin 151 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.relation.senia 249352 es_ES
dc.contributor.funder Ministerio de Ciencia e Innovación es_ES
dc.contributor.funder Generalitat Valenciana es_ES
dc.contributor.funder Comunidad de Madrid es_ES
dc.contributor.funder Ministerio de Educación, Cultura y Deporte es_ES
dc.contributor.funder Ministerio de Economía y Competitividad es_ES
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