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Improving schedulabity on the SMT Multicore Intel Xeon e-5645 under real-time systems

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Improving schedulabity on the SMT Multicore Intel Xeon e-5645 under real-time systems

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dc.contributor.advisor Sahuquillo Borrás, Julio es_ES
dc.contributor.advisor Hassan Mohamed, Houcine es_ES
dc.contributor.advisor Feliu Pérez, Josué
dc.contributor.author Furió Novejarque, Clara es_ES
dc.date.accessioned 2016-10-26T07:09:40Z
dc.date.available 2016-10-26T07:09:40Z
dc.date.created 2016-07-14
dc.date.issued 2016-10-26 es_ES
dc.identifier.uri http://hdl.handle.net/10251/72762
dc.description.abstract [EN] Traditionally, the study of real-time systems has mainly focused on hardware systems simple enough that make its study easy; for instance, system modeling and schedulability analysis. This implies that the processors usually included in real-time systems do not implement advanced performance features. The increasing number of functionalities in real-time embedded systems (e.g. smartphones), however, is resulting in a processor convergence between high performance systems and embedded systems. Therefore it is expected that advanced SMT processors will be soon deployed in realtime devices. In this context, the use of analytical models may become inappropriate due to its lack of accuracy to study the behavior of modern and future real-time systems. In this work, we propose a new scheduling framework for SMT multicore processors to cover the design stages of real-time scheduling policies. The proposed framework works on the Linux operating system and allows changing the scheduling policy as well as the job-to-core allocation policy without modifying the kernel, which facilitates and makes faster the development of new scheduling proposals. Two case studies on the Intel Xeon E5645 are also presented for illustrative purposes. Two well-known real-time scheduling algorithms: Earliest Deadline First (EDF) and Rate Monotonic (RM) have been implemented and studied by executing real benchmarks. es_ES
dc.format.extent 54 es_ES
dc.language Inglés es_ES
dc.publisher Universitat Politècnica de València es_ES
dc.rights Reserva de todos los derechos es_ES
dc.subject Scheduling framework es_ES
dc.subject Schedulability es_ES
dc.subject Real-time systems es_ES
dc.subject SMT processors es_ES
dc.subject Scheduling policy es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.subject.other Grado en Ingeniería Electrónica Industrial y Automática-Grau en Enginyeria Electrònica Industrial i Automàtica es_ES
dc.title Improving schedulabity on the SMT Multicore Intel Xeon e-5645 under real-time systems es_ES
dc.type Proyecto/Trabajo fin de carrera/grado es_ES
dc.rights.accessRights Cerrado es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.contributor.affiliation Universitat Politècnica de València. Escuela Técnica Superior de Ingeniería del Diseño - Escola Tècnica Superior d'Enginyeria del Disseny es_ES
dc.description.bibliographicCitation Furió Novejarque, C. (2016). Improving schedulabity on the SMT Multicore Intel Xeon e-5645 under real-time systems. http://hdl.handle.net/10251/72762 es_ES
dc.description.accrualMethod TFGM es_ES
dc.relation.pasarela TFGM\46993 es_ES


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