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Enhancing the L1 Data Cache Design to Mitigate HCI

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Valero Bresó, A.; Miralaei, N.; Petit Martí, SV.; Sahuquillo Borrás, J.; Jones, TM. (2016). Enhancing the L1 Data Cache Design to Mitigate HCI. IEEE Computer Architecture Letters. 15(2):93-96. https://doi.org/10.1109/LCA.2015.2460736

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/81469

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Title: Enhancing the L1 Data Cache Design to Mitigate HCI
Author: Valero Bresó, Alejandro Miralaei, Negar Petit Martí, Salvador Vicente Sahuquillo Borrás, Julio Jones, Timothy M.
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica
Issued date:
Abstract:
[EN] Over the lifetime of a microprocessor, the Hot Carrier Injection (HCI) phenomenon degrades the threshold voltage, which causes slower transistor switching and eventually results in timing violations and faulty operation. ...[+]
Subjects: Cache memories , Cell flip peaks , Hot Carrier Injection , Threshold voltage degradation
Copyrigths: Reserva de todos los derechos
Source:
IEEE Computer Architecture Letters. (issn: 1556-6056 )
DOI: 10.1109/LCA.2015.2460736
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Publisher version: http://dx.doi.org/10.1109/LCA.2015.2460736
Project ID:
info:eu-repo/grantAgreement/EC/FP7/287759
MINECO/TIN2012-38341-C04-01
EPSRC/EP/K026399/1
EPSRC/EP/J016284/1
Description: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Thanks:
This work has been supported by the Spanish Ministerio de Economia y Competitividad (MINECO), by FEDER funds through Grant TIN2012-38341-C04-01, by the Intel Early Career Faculty Honor Program Award, by a HiPEAC Collaboration ...[+]
Type: Artículo

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