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dc.contributor.author | Peñaranda Cebrián, Roberto | es_ES |
dc.contributor.author | Gómez Requena, Crispín | es_ES |
dc.contributor.author | Gómez Requena, María Engracia | es_ES |
dc.contributor.author | López Rodríguez, Pedro Juan | es_ES |
dc.contributor.author | Duato Marín, José Francisco | es_ES |
dc.date.accessioned | 2017-05-31T07:57:28Z | |
dc.date.available | 2017-05-31T07:57:28Z | |
dc.date.issued | 2016-03 | |
dc.identifier.issn | 0920-8542 | |
dc.identifier.uri | http://hdl.handle.net/10251/82062 | |
dc.description | The final publication is available at Springer via http://dx.doi.org/10.1007/s11227-016-1640-z | es_ES |
dc.description.abstract | In large-scale supercomputers, the interconnection network plays a key role in system performance. Network topology highly defines the performance and cost of the interconnection network. Direct topologies are sometimes used due to its reduced hardware cost, but the number of network dimensions is limited by the physical 3D space, which leads to an increase of the communication latency and a reduction of network throughput for large machines. Indirect topologies can provide better performance for large machines, but at higher hardware cost. In this paper, we propose a new family of hybrid topologies, the k-ary n-direct s-indirect, that combines the best features from both direct and indirect topologies to efficiently connect an extremely high number of processing nodes. The proposed network is an n-dimensional topology where the k nodes of each dimension are connected through a small indirect topology of s stages. This combination results in a family of topologies that provides high performance, with latency and throughput figures of merit close to indirect topologies, but at a lower hardware cost. In particular, it doubles the throughput obtained per cost unit compared with indirect topologies in most of the cases. Moreover, their fault-tolerance degree is similar to the one achieved by direct topologies built with switches with the same number of ports. | es_ES |
dc.description.sponsorship | This work was supported by the Spanish Ministerio de Economa y Competitividad (MINECO) and by FEDER funds under Grant TIN2012-38341-C04-01 and by Programa de Ayudas de Investigacion y Desarrollo (PAID) from Universitat Politecnica de Valencia. | en_EN |
dc.language | Inglés | es_ES |
dc.publisher | Springer Verlag (Germany) | es_ES |
dc.relation.ispartof | Journal of Supercomputing | es_ES |
dc.rights | Reserva de todos los derechos | es_ES |
dc.subject | High-performance computing | es_ES |
dc.subject | Interconnection networks | es_ES |
dc.subject | Direct topologies | es_ES |
dc.subject | Indirect topologies | es_ES |
dc.subject | Hybrid topologies | es_ES |
dc.subject | Routing | es_ES |
dc.subject.classification | ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES | es_ES |
dc.title | The k-ary n-direct s-indirect family of topologies for large-scale interconnection networks | es_ES |
dc.type | Artículo | es_ES |
dc.identifier.doi | 10.1007/s11227-016-1640-z | |
dc.relation.projectID | info:eu-repo/grantAgreement/MINECO//TIN2012-38341-C04-01/ES/MEJORA DE LA ARQUITECTURA DE SERVIDORES, SERVICIOS Y APLICACIONES/ | es_ES |
dc.rights.accessRights | Abierto | es_ES |
dc.contributor.affiliation | Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica | es_ES |
dc.contributor.affiliation | Universitat Politècnica de València. Instituto Universitario de Aplicaciones de las Tecnologías de la Información - Institut Universitari d'Aplicacions de les Tecnologies de la Informació | es_ES |
dc.description.bibliographicCitation | Peñaranda Cebrián, R.; Gómez Requena, C.; Gómez Requena, ME.; López Rodríguez, PJ.; Duato Marín, JF. (2016). The k-ary n-direct s-indirect family of topologies for large-scale interconnection networks. Journal of Supercomputing. 72(3):1035-1062. https://doi.org/10.1007/s11227-016-1640-z | es_ES |
dc.description.accrualMethod | S | es_ES |
dc.relation.publisherversion | https://link.springer.com/article/10.1007/s11227-016-1640-z | es_ES |
dc.description.upvformatpinicio | 1035 | es_ES |
dc.description.upvformatpfin | 1062 | es_ES |
dc.type.version | info:eu-repo/semantics/publishedVersion | es_ES |
dc.description.volume | 72 | es_ES |
dc.description.issue | 3 | es_ES |
dc.relation.senia | 311496 | es_ES |
dc.contributor.funder | Ministerio de Economía y Competitividad | es_ES |
dc.contributor.funder | Universitat Politècnica de València | es_ES |
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