Analysis and Design of Electrostatic Discharge Protection Devices and Circuits

An electrostatic discharge (ESD) is a spontaneous electrical current that flows between two objects at different electrical potentials. ESD currents can reach several amps and are typically in the order of tens of nanoseconds. Concerning microelectronics, on-chip protection against ESD events has become a main concern on the reliability of IC as dimensions continue to shrink. ESD currents could lead to on-chip voltages that are high enough to cause MOS gate oxide breakdown. ICs can thus be damaged by human handling, contact with machinery, packaging, board assembling, etc. The main goal of this study was to analyze the effectiveness of two-stage ESD protection circuits by means of mixed mode TCAD simulations. Two-dimensional device simulations were carried out using T-Suprem4 and Taurus-Medici software from Synopsis. Also, a TCAD input deck calibration for an NXP Semiconductors¿ proprietary 0.14m¿ CMOS technology was realized. In addition, two aspects on the transparency of ESD protections were studied. An excessive leakage problem found in a real product was analyzed in TCAD. Furthermore, a new approach for distributed ESD protection design for broadband applications is also discussed, resulting in improved RF performance.