Fundamental Building Blocks for Scalable Photonic Programmable Processors

dc.contributor.authorGómez-Hidalgo, Cristinaes_ES
dc.contributor.authorFernandez-Vicente, Juanes_ES
dc.contributor.authorBalbastre-Benavent, Nataliaes_ES
dc.contributor.authorManglano-Bermejo, Mariaes_ES
dc.contributor.authorPapadovasilakis, Marioses_ES
dc.contributor.authorElsharabasy, Ahmedes_ES
dc.contributor.authorBanos-Lopez, Rocioes_ES
dc.contributor.authorBenitez-Gonzalez, Jesuses_ES
dc.contributor.authorGutierrez-Campo, Anaes_ES
dc.contributor.authorHoekstra, Tsjerkes_ES
dc.contributor.authorPerez-Lopez, Danieles_ES
dc.contributor.authorTorrijos-Moran, Luises_ES
dc.contributor.funderEuropean Commissiones_ES
dc.date.accessioned2026-05-20T19:02:18Z
dc.date.available2026-05-20T19:02:18Z
dc.date.issued2026-04es_ES
dc.description.abstract[EN] Photonics technology is emerging as a key enabler, complementing electronics in next-generation applications by offering greater bandwidth, lower latency and improved energy efficiency. Silicon photonic programmable processors bring these advantages to a solid-state platform, providing compact form factors and low power consumption, although the scalability of densely integrated circuits is still under active investigation. In this article, we present a comprehensive study of the essential photonic components required for large-scale integration of silicon photonic processors, covering both design and experimental demonstration. We analyse and optimise the fundamental building blocks-including splitters, phase shifters, and crossings-and experimentally validate their scalability through wafer-scale characterisation. To finish, we illustrate the impact at the circuit level in a optical switch loaded with high-speed transmission and discuss the remaining challenges for large-scale integration.es_ES
dc.description.accrualMethodSes_ES
dc.description.bibliographicCitationGómez-Hidalgo, C.; Fernandez-Vicente, J.; Balbastre-Benavent, N.; Manglano-Bermejo, M.; Papadovasilakis, M.; Elsharabasy, A.; Banos-Lopez, R.... (2026). Fundamental Building Blocks for Scalable Photonic Programmable Processors. Nanophotonics. 15(8). https://doi.org/10.1002/nap2.70100es_ES
dc.description.issue8es_ES
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dc.description.sponsorshipThis work has received funding from the ERC Starting Grant programme under Grant Agreement No. 101076175 (LS-Photonics Project) and from the HORIZON-EIC-2024-ACCELERATOR under Grant Agreement No. 101217820 (EXCITE Project).es_ES
dc.description.volume15es_ES
dc.identifier.doi10.1002/nap2.70100es_ES
dc.identifier.issn2192-8606es_ES
dc.identifier.urihttps://riunet.upv.es/handle/10251/235319
dc.languageIngléses_ES
dc.publisherWalter de Gruyter GmbHes_ES
dc.relation.ispartofNanophotonicses_ES
dc.relation.pasarelaS\581865es_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/EC/HE/101076175/EU/Large-scale Multicore Smart Photonics: Using advanced design and configuration protocols to develop the largest-scale programmable photonic processor/es_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/EC//101217820/es_ES
dc.relation.publisherversionhttps://doi.org/10.1002/nap2.70100es_ES
dc.rightsReconocimiento (by)es_ES
dc.rights.accessRightsAbiertoes_ES
dc.subjectLarge-scale silicon photonicses_ES
dc.subjectOptical networkinges_ES
dc.subjectOptical switcheses_ES
dc.subjectProgrammable photonic processorses_ES
dc.titleFundamental Building Blocks for Scalable Photonic Programmable Processorses_ES
dc.typeArtículoes_ES
dc.type.versioninfo:eu-repo/semantics/publishedVersiones_ES
dspace.entity.typePublication
upv.uuid640fcde7-49d9-4b2c-ba0c-6b63a1344befes_ES

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