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Accelerating the task/data-parallel version of ILUPACK¿s BiCG in multi-CPU/GPU configurations

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Accelerating the task/data-parallel version of ILUPACK¿s BiCG in multi-CPU/GPU configurations

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dc.contributor.author Aliaga, Jose I. es_ES
dc.contributor.author Dufrechou, Ernesto es_ES
dc.contributor.author Ezzatti, Pablo es_ES
dc.contributor.author Quintana-Ortí, Enrique S. es_ES
dc.date.accessioned 2020-12-31T04:31:02Z
dc.date.available 2020-12-31T04:31:02Z
dc.date.issued 2019-07 es_ES
dc.identifier.issn 0167-8191 es_ES
dc.identifier.uri http://hdl.handle.net/10251/158174
dc.description.abstract [EN] ILUPACK is a valuable tool for the solution of sparse linear systems via iterative Krylov subspace-based methods. Its relevance for the solution of real problems has motivated several efforts to enhance its performance on parallel machines. In this work we focus on exploiting the task-level parallelism derived from the structure of the BiCG method, in addition to the data-level parallelism of the internal matrix computations, with the goal of boosting the performance of a GPU (graphics processing unit) implementation of this solver. First, we revisit the use of dual-GPU systems to execute independent stages of the BiCG concurrently on both accelerators, while leveraging the extra memory space to improve the data access patterns. In addition, we extend our ideas to compute the BiCG method efficiently in multicore platforms with a single GPU. In this line, we study the possibilities offered by hybrid CPU-GPU computations, as well as a novel synchronization-free sparse triangular linear solver. The experimental results with the new solvers show important acceleration factors with respect to the previous data-parallel CPU and GPU versions. (C) 2019 Elsevier B.V. All rights reserved. es_ES
dc.description.sponsorship J. I. Aliaga and E. S. Quintana-Orti were supported by project TIN2017-82972-R of the MINECO and FEDER. E. Dufrechou and P. Ezzatti were supported by Programa de Desarrollo de las Ciencias Basicas (PEDECIBA), Uruguay. es_ES
dc.language Inglés es_ES
dc.publisher Elsevier es_ES
dc.relation.ispartof Parallel Computing es_ES
dc.rights Reconocimiento - No comercial - Sin obra derivada (by-nc-nd) es_ES
dc.subject Sparse linear systems es_ES
dc.subject Iterative Krylov-subspace methods es_ES
dc.subject Data parallelism es_ES
dc.subject ILUPACK preconditioner es_ES
dc.subject Graphics processing units (GPUs) es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title Accelerating the task/data-parallel version of ILUPACK¿s BiCG in multi-CPU/GPU configurations es_ES
dc.type Artículo es_ES
dc.identifier.doi 10.1016/j.parco.2019.02.005 es_ES
dc.relation.projectID info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TIN2017-82972-R/ES/TECNICAS ALGORITMICAS PARA COMPUTACION DE ALTO RENDIMIENTO CONSCIENTE DEL CONSUMO ENERGETICO Y RESISTENTE A ERRORES/ es_ES
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.description.bibliographicCitation Aliaga, JI.; Dufrechou, E.; Ezzatti, P.; Quintana-Ortí, ES. (2019). Accelerating the task/data-parallel version of ILUPACK¿s BiCG in multi-CPU/GPU configurations. Parallel Computing. 85:79-87. https://doi.org/10.1016/j.parco.2019.02.005 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion https://doi.org/10.1016/j.parco.2019.02.005 es_ES
dc.description.upvformatpinicio 79 es_ES
dc.description.upvformatpfin 87 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 85 es_ES
dc.relation.pasarela S\396806 es_ES
dc.contributor.funder European Regional Development Fund es_ES
dc.contributor.funder Universidad de la República, Uruguay es_ES
dc.contributor.funder Agencia Estatal de Investigación es_ES
dc.contributor.funder Ministerio de Educación y Cultura, Uruguay es_ES


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