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A hierarchical architecture for time- and event-triggered real-time systems

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A hierarchical architecture for time- and event-triggered real-time systems

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Real Sáez, JV.; Sáez Barona, S.; Crespo, A. (2019). A hierarchical architecture for time- and event-triggered real-time systems. Journal of Systems Architecture. 101:1-15. https://doi.org/10.1016/j.sysarc.2019.101652

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/158938

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Title: A hierarchical architecture for time- and event-triggered real-time systems
Author: Real Sáez, Jorge Vicente Sáez Barona, Sergio Crespo, Alfons
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Embargo end date: 2021-12-31
Abstract:
[EN] This paper proposes an architecture for combining the execution of time- and event-triggered real-time task sets. This makes it possible for the designer to choose the most appropriate mechanism depending on the role ...[+]
Subjects: Real-time systems , Time-triggered scheduling , Ravenscar tasking profile , High-integrity systems , Embedded systems
Copyrigths: Embargado
Source:
Journal of Systems Architecture. (issn: 1383-7621 )
DOI: 10.1016/j.sysarc.2019.101652
Publisher:
Elsevier
Publisher version: https://doi.org/10.1016/j.sysarc.2019.101652
Project ID:
info:eu-repo/grantAgreement/EC/H2020/737475/EU
AEI/TIN2017-86520-C3-1-R-AR
Thanks:
This work has been partly supported by Spanish Government and FEDER funds (AEI/FEDER, UE) under grant (TIN2017-86520-C3-1-R) (PRECON-I4); and by European Commission project AQUAS (ECSEL-JU, Contract 737475).
Type: Artículo

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