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Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms

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Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms

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Rodríguez-Agut, D.; Tornero-Gavilá, R.; Flich Cardo, J. (2023). Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms. IEEE. 1-6. https://doi.org/10.23919/DATE56975.2023.10137117

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/202929

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Title: Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms
Author: Rodríguez-Agut, David Tornero-Gavilá, Rafael Flich Cardo, José
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica
Issued date:
Abstract:
[EN] Nowadays, convolutional neural networks (CNN) are common in a wide range of applications. Their high accuracy and efficiency contrast with their computing requirements, leading to the search for efficient hardware ...[+]
Subjects: Multi-FPGA , Neural Networks , Deep Learning
Copyrigths: Reserva de todos los derechos
ISBN: 978-3-9819263-7-8
Source:
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE). (issn: 1938-1891 )
DOI: 10.23919/DATE56975.2023.10137117
Publisher:
IEEE
Publisher version: https://doi.org/10.23919/DATE56975.2023.10137117
Conference name: Design, Automation and Test in Europe Conference (DATE 2023)
Conference place: Antwerp, Belgium
Conference date: Abril 17-19,2023
Project ID:
info:eu-repo/grantAgreement/EC/H2020/955558/EU
Type: Comunicación en congreso Artículo Capítulo de libro

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