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Design and Layout of an Input Interface for a Digital Transmit Chain in 28 nm CMOS technology

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Design and Layout of an Input Interface for a Digital Transmit Chain in 28 nm CMOS technology

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Ferrer García, Y. (2011). Design and Layout of an Input Interface for a Digital Transmit Chain in 28 nm CMOS technology. http://hdl.handle.net/10251/27160.

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Title: Design and Layout of an Input Interface for a Digital Transmit Chain in 28 nm CMOS technology
Author:
Director(s): Berroth, Manfres Schmidt, Martin
UPV Unit: Universitat Politècnica de València. Escuela Técnica Superior de Ingenieros de Telecomunicación - Escola Tècnica Superior d'Enginyers de Telecomunicació
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2011-09-13
Issued date:
Copyrigths: Cerrado
degree: Ingeniería en Telecomunicación-Enginyeria en Telecomunicació
Type: Proyecto/Trabajo fin de carrera/grado

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