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Switch-based packing technique to reduce traffic and latency in token coherence

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Switch-based packing technique to reduce traffic and latency in token coherence

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dc.contributor.author Cuesta Sáez, Blas Antonio es_ES
dc.contributor.author Robles Martínez, Antonio es_ES
dc.contributor.author Duato Marín, José Francisco es_ES
dc.date.accessioned 2014-05-05T07:21:06Z
dc.date.issued 2012-03
dc.identifier.issn 0743-7315
dc.identifier.uri http://hdl.handle.net/10251/37223
dc.description.abstract Token Coherence is a cache coherence protocol able to simultaneously capture the best attributes of traditional protocols: low latency and scalability. However it may lose these desired features when (1) several nodes contend for the same memory block and (2) nodes write highly-shared blocks. The first situation leads to the issue of simultaneous broadcast requests which threaten the protocol scalability. The second situation results in a burst of token responses directed to the writer, which turn it into a bottleneck and increase the latency. To address these problems, we propose a switch-based packing technique able to encapsulate several messages (while in transit) into just one. Its application to the simultaneous broadcasts significantly reduces their bandwidth requirements (up to 45%). Its application to token responses lowers their transmission latency (by 70%). Thus, the packing technique decreases both the latency and coherence traffic, thereby improving system performance (about 15% of reduction in runtime). © 2011 Elsevier Inc. All rights reserved. es_ES
dc.description.sponsorship This work was partially supported by the Spanish MEC and MICINN, as well as European Commission FEDER funds, under Grants CSD2006-00046 and TIN2009-14475-C04-01. en_EN
dc.format.extent 15 es_ES
dc.language Inglés es_ES
dc.publisher Elsevier es_ES
dc.relation Spanish MEC and MICINN es_ES
dc.relation European Commission FEDER funds [CSD2006-00046 and TIN2009- 14475-C04-01] es_ES
dc.relation.ispartof Journal of Parallel and Distributed Computing es_ES
dc.rights Reserva de todos los derechos es_ES
dc.subject Cache coherence protocol es_ES
dc.subject Combining switches es_ES
dc.subject Message packing es_ES
dc.subject Scalability es_ES
dc.subject Token coherence es_ES
dc.subject Traffic reduction es_ES
dc.subject Bandwidth requirement es_ES
dc.subject Packing techniques es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title Switch-based packing technique to reduce traffic and latency in token coherence es_ES
dc.type Artículo es_ES
dc.embargo.lift 10000-01-01
dc.embargo.terms forever es_ES
dc.identifier.doi 10.1016/j.jpdc.2011.11.010
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.description.bibliographicCitation Cuesta Sáez, BA.; Robles Martínez, A.; Duato Marín, JF. (2012). Switch-based packing technique to reduce traffic and latency in token coherence. Journal of Parallel and Distributed Computing. 72(3):409-423. doi:10.1016/j.jpdc.2011.11.010 es_ES
dc.description.accrualMethod Senia es_ES
dc.relation.publisherversion http://dx.doi.org/10.1016/j.jpdc.2011.11.010 es_ES
dc.description.upvformatpinicio 409 es_ES
dc.description.upvformatpfin 423 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 72 es_ES
dc.description.issue 3 es_ES
dc.relation.senia 223441


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