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Introduction to the Special Section on On-Chip and Off-Chip Network Architectures

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Flich Cardo, J.; Palesi, M. (2013). Introduction to the Special Section on On-Chip and Off-Chip Network Architectures. ACM Transactions in Embedded Computing Systems. 12(4):104:1-104:2. doi:10.1145/2485984.2485992

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/39674

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Title: Introduction to the Special Section on On-Chip and Off-Chip Network Architectures
Author: Flich Cardo, José Palesi, Maurizio
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
Interconnection networks are pervasive in most current systems, spanning large supercomputer installations to multiprocessor chips and embedded systems. Every year, the number of processing elements to interconnect ...[+]
Copyrigths: Cerrado
Source:
ACM Transactions in Embedded Computing Systems. (issn: 1539-9087 )
DOI: 10.1145/2485984.2485992
Publisher:
Association for Computing Machinery (ACM)
Publisher version: http://doi.acm.org/10.1145/2485984.2485992
Project ID:
info:eu-repo/grantAgreement/J4EC/FP7/287759/EU
Description: © ACM, 2013. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in PUBLICATION, ACM Transactions on Embedded Computing Systems, Vol. 12, No. 4, Article 104, Publication date: June 2013. http://doi.acm.org/10.1145/2485984.2485992
Type: Artículo

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