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Introduction to the Special Section on On-Chip and Off-Chip Network Architectures

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Introduction to the Special Section on On-Chip and Off-Chip Network Architectures

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dc.contributor.author Flich Cardo, José es_ES
dc.contributor.author Palesi, Maurizio es_ES
dc.date.accessioned 2014-09-16T08:24:37Z
dc.date.available 2014-09-16T08:24:37Z
dc.date.issued 2013-06
dc.identifier.issn 1539-9087
dc.identifier.uri http://hdl.handle.net/10251/39674
dc.description © ACM, 2013. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in PUBLICATION, ACM Transactions on Embedded Computing Systems, Vol. 12, No. 4, Article 104, Publication date: June 2013. http://doi.acm.org/10.1145/2485984.2485992 es_ES
dc.description.abstract Interconnection networks are pervasive in most current systems, spanning large supercomputer installations to multiprocessor chips and embedded systems. Every year, the number of processing elements to interconnect increases both at the cluster level and at the chip level, so the performance of the interconnect becomes a predominant factor. es_ES
dc.language Inglés es_ES
dc.publisher Association for Computing Machinery (ACM) es_ES
dc.relation.ispartof ACM Transactions in Embedded Computing Systems es_ES
dc.rights Reserva de todos los derechos es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title Introduction to the Special Section on On-Chip and Off-Chip Network Architectures es_ES
dc.type Artículo es_ES
dc.identifier.doi 10.1145/2485984.2485992
dc.relation.projectID info:eu-repo/grantAgreement/EC/FP7/287759/EU/High Performance and Embedded Architecture and Compilation/
dc.rights.accessRights Cerrado es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors es_ES
dc.description.bibliographicCitation Flich Cardo, J.; Palesi, M. (2013). Introduction to the Special Section on On-Chip and Off-Chip Network Architectures. ACM Transactions in Embedded Computing Systems. 12(4):104:1-104:2. doi:10.1145/2485984.2485992 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion http://doi.acm.org/10.1145/2485984.2485992 es_ES
dc.description.upvformatpinicio 104:1 es_ES
dc.description.upvformatpfin 104:2 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 12 es_ES
dc.description.issue 4 es_ES
dc.relation.senia 264530


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