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Multiple-vote symbol flipping decoder for non-binary LDPC codes

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Multiple-vote symbol flipping decoder for non-binary LDPC codes

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García Herrero, FM.; Li, E.; Declercq, D.; Valls Coquillat, J. (2014). Multiple-vote symbol flipping decoder for non-binary LDPC codes. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22(11):2256-2267. doi:10.1109/TVLSI.2013.2292900

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/52446

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Title: Multiple-vote symbol flipping decoder for non-binary LDPC codes
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Ingeniería Electrónica - Departament d'Enginyeria Electrònica
Universitat Politècnica de València. Instituto Universitario de Telecomunicación y Aplicaciones Multimedia - Institut Universitari de Telecomunicacions i Aplicacions Multimèdia
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Abstract:
A multiple-vote symbol-flipping (MV-SF) decoding algorithm for nonbinary low-density parity-check (NB-LDPC) codes is proposed in this paper. Our algorithm improves the generalized bit-flipping algorithm (GBFDA) by considering ...[+]
Subjects: Decoding , Error correction codes , Information theory , Iterative decoding
Copyrigths: Cerrado
Source:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. (issn: 1063-8210 )
DOI: 10.1109/TVLSI.2013.2292900
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Publisher version: http://dx.doi.org/10.1109/TVLSI.2013.2292900
Thanks:
This work was supported in part by the Spanish Ministerio de Ciencia e Innovacion under Grant TEC2011-27916, in part by the Universitat Politecnica de Valencia under Grant SP20120625, and in part by the Institut Universitaire ...[+]
Type: Artículo

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