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A reuse-based refresh policy for energy-aware eDRAM caches

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A reuse-based refresh policy for energy-aware eDRAM caches

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Valero Bresó, A.; Petit Martí, SV.; Sahuquillo Borrás, J.; Kaeli, DR.; Duato Marín, JF. (2015). A reuse-based refresh policy for energy-aware eDRAM caches. Microprocessors and Microsystems. 39(1):37-48. doi:10.1016/j.micpro.2014.12.001

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/64110

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Title: A reuse-based refresh policy for energy-aware eDRAM caches
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
DRAM technology requires refresh operations to be performed in order to avoid data loss due to capacitance leakage. Refresh operations consume a significant amount of dynamic energy, which increases with the storage ...[+]
Subjects: On-chip caches , Reuse information , Selective refresh
Copyrigths: Reserva de todos los derechos
Source:
Microprocessors and Microsystems. (issn: 0141-9331 )
DOI: 10.1016/j.micpro.2014.12.001
Publisher:
Elsevier
Publisher version: http://dx.doi.org/10.1016/j.micpro.2014.12.001
Thanks:
This work was supported by the Spanish Ministerio de Economia y Competitiyidad (MINECO) and FEDER funds under Grant TIN2012-38341-C04-01. Additionally, it was also supported by the Intel Early Career Honor Programme Award ...[+]
Type: Artículo

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