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dc.contributor.author | Bishnoi, Rimpy | es_ES |
dc.contributor.author | Laxmi, Vijay | es_ES |
dc.contributor.author | Gaur, Manoj Singh | es_ES |
dc.contributor.author | Flich Cardo, José | es_ES |
dc.contributor.author | Trivino, Francisco | es_ES |
dc.date.accessioned | 2016-06-09T08:34:51Z | |
dc.date.available | 2016-06-09T08:34:51Z | |
dc.date.issued | 2015-01 | |
dc.identifier.issn | 1539-9087 | |
dc.identifier.uri | http://hdl.handle.net/10251/65562 | |
dc.description | © ACM, 2015. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in ACM Transactions on Embedded Computing Systems, Vol. 14, No. 1, Article 2, january 2015. http://doi.acm.org/10.1145/2668121 | es_ES |
dc.description.abstract | [EN] In the Ghiribaldi et al. [2013] paper, a complete self-testing and self configuring NoC infrastructure for cost-effective MPSoCs was presented in order to make NoC architecture tolerant to faults. To overcome the complexity involved during the complete reconfiguration of routing instances in the face of most of the usual failure patterns, Ghiribaldi et al. [2013] proposed a fast self-reconfiguration algorithm. The algorithm is based on segment-based routing implemented using Logic-Based Distributed Routing (LBDR) and claimed to have handled the most common NoC faults. The purpose of this comment is to demonstrate the inconsistency of the fast self-configuration method presented in Ghiribaldi et al. [2013]. To handle inconsistency, we present the correct set of LBDR bits and also argue that complete reconfiguration of the routing instance is mandatory to handle some fault combinations. New coverage results of the fast self-reconfiguration algorithm of Ghiribaldi et al. [2013] are also presented. | es_ES |
dc.description.sponsorship | This work is supported by Indo-Spain DST project under grant DST/INT/Spain/P35/11/1 and Spanish Ministerio de Economa y Competitividad (MINECO) under grant PRI-PIBIN-2011-0989 | |
dc.language | Inglés | es_ES |
dc.publisher | Association for Computing Machinery (ACM) | es_ES |
dc.relation.ispartof | ACM Transactions in Embedded Computing Systems | es_ES |
dc.rights | Reserva de todos los derechos | es_ES |
dc.subject | Design | es_ES |
dc.subject | Algorithms | es_ES |
dc.subject | Reliability | es_ES |
dc.subject | Network-on-Chip | es_ES |
dc.subject | Fault tolerance | es_ES |
dc.subject.classification | ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES | es_ES |
dc.title | A Brief Comment on "A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs" | es_ES |
dc.type | Artículo | es_ES |
dc.identifier.doi | 10.1145/2668121 | |
dc.relation.projectID | info:eu-repo/grantAgreement/DST//P35%2F11%2F1/ | es_ES |
dc.relation.projectID | info:eu-repo/grantAgreement/MICINN//PRI-PIBIN-2011-0989/ES/Plataforma de simulación de redes en chip para co-diseño fiable, detallado y rápido de sistemas mult/ | es_ES |
dc.rights.accessRights | Abierto | es_ES |
dc.contributor.affiliation | Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors | es_ES |
dc.description.bibliographicCitation | Bishnoi, R.; Laxmi, V.; Gaur, MS.; Flich Cardo, J.; Trivino, F. (2015). A Brief Comment on "A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs". ACM Transactions in Embedded Computing Systems. 14(1):1-9. https://doi.org/10.1145/2668121 | es_ES |
dc.description.accrualMethod | S | es_ES |
dc.relation.publisherversion | http://dx.doi.org/10.1145/2668121 | es_ES |
dc.description.upvformatpinicio | 1 | es_ES |
dc.description.upvformatpfin | 9 | es_ES |
dc.type.version | info:eu-repo/semantics/publishedVersion | es_ES |
dc.description.volume | 14 | es_ES |
dc.description.issue | 1 | es_ES |
dc.relation.senia | 301396 | es_ES |
dc.contributor.funder | Department of Science and Technology, Ministry of Science and Technology, India | |
dc.contributor.funder | Ministerio de Economía y Competitividad | |
dc.description.references | A. Ghiribaldi, D. Ludovici, F. Triviño, A. Strano, J. Flich, J. L. Sánchez, F. Alfaro, M. Favalli, and D. Bertozzi. 2013. A complete self-testing and self-configuring NoC infrastructure for cost-effective MPSoCs. ACM Trans. Embed. Comput. Syst. 12, 4 (July 2013), 106:1--106:29. DOI: http://dx.doi.org/10.1145/2485984.2485994 | es_ES |
dc.description.references | A. Mejia. 2008. Design and Implementation of Efficient Topology Agnostic Routing Algorithms for Interconnection Networks. Ph.D. Dissertation. University of Valencia. | es_ES |
dc.description.references | A. Mejia, J. Flich, and J. Duato. 2008. On the potentials of segment-based routing for NoCs. In Proceedings of the 37th International Conference on Parallel Processing (ICPP’08). IEEE, 594--603. DOI: http://dx.doi.org/10.1109/ICPP.2008.56 | es_ES |
dc.description.references | S. Rodrigo, S. Medardoni, J. Flich, D. Bertozzi, and J. Duato. 2009. Efficient implementation of distributed routing algorithms for NoCs. IET Comput. Digital Techn. 3, 5 (2009), 460--475. DOI: http://dx.doi.org/10.1049/iet-cdt.2008.0092 | es_ES |
dc.description.references | A. Strano, D. Bertozzi, F. Trivino, J. L. Sanchez, F. J. Alfaro, and J. Flich. 2012. OSR-Lite: Fast and deadlock-free NoC reconfiguration framework. In Proceedings of the International Conference on Embedded Computer Systems (SAMOS’12). 86--95. DOI: http://dx.doi.org/10.1109/SAMOS.2012.6404161 | es_ES |