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Analysis and RTL Correlation of Instruction Set Simulators for Automotive Microcontroller Robustness Verification

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Analysis and RTL Correlation of Instruction Set Simulators for Automotive Microcontroller Robustness Verification

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Espinosa García, J.; Hernández Luz, C.; Abella, J.; Andrés Martínez, DD.; Ruiz García, JC. (2015). Analysis and RTL Correlation of Instruction Set Simulators for Automotive Microcontroller Robustness Verification. ACM. https://doi.org/10.1145/2744769.2744798

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Título: Analysis and RTL Correlation of Instruction Set Simulators for Automotive Microcontroller Robustness Verification
Autor: Espinosa García, Jaime Hernández Luz, Carles Abella, Jaume Andrés Martínez, David de Ruiz García, Juan Carlos
Entidad UPV: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Universitat Politècnica de València. Departamento de Ingeniería de Sistemas y Automática - Departament d'Enginyeria de Sistemes i Automàtica
Fecha difusión:
Resumen:
Increasingly complex microcontroller designs for safety-relevant automotive systems require the adoption of new methods and tools to enable a cost-effective verification of their robustness. In particular, costs associated ...[+]
Derechos de uso: Reserva de todos los derechos
ISBN: 978-1-4503-3520-1
DOI: 10.1145/2744769.2744798
Editorial:
ACM
Versión del editor: http://dl.acm.org/citation.cfm?doid=2744769.2744798
Título del congreso: 52nd Design Automation Conference (DAC 2015)
Lugar del congreso: San Francisco, USA
Fecha congreso: June, 7-11, 2015
Código del Proyecto:
info:eu-repo/grantAgreement/EC/FP7/295311/EU/Verification and Testing to Support Functional Safety Standards/
info:eu-repo/grantAgreement/MICINN//TIN2012-34557/ES/COMPUTACION DE ALTAS PRESTACIONES VI/
info:eu-repo/grantAgreement/EC/H2020/871174/EU/High Performance Embedded Architecture and Compilation/
info:eu-repo/grantAgreement/MINECO//RYC-2013-14717/ES/RYC-2013-14717/
Descripción: © ACM 2015 This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in ACM, In Proceedings of the 52nd Annual Design Automation Conference (p. 40). http://dx.doi.org/10.1145/2744769.2744798.
Agradecimientos:
The research leading to these results has received funding from the ARTEMIS Joint Undertaking VeTeSS project under grant agreement number 295311. This work has also been funded by the Ministry of Science and Technology of ...[+]
Tipo: Comunicación en congreso

References

ARTEMIS Joint Undertaking.VeTeSS project:www.vetess.eu.

J.-C. Baraza, et al. Enhancement of fault injection techniques based on the modification of vhdl code.IEEE Transactions on VLSI, 16(6):693--706, June 2008.

Alfredo Benso et al.Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation.Kluwer Academic Publishers, 2003. [+]
ARTEMIS Joint Undertaking.VeTeSS project:www.vetess.eu.

J.-C. Baraza, et al. Enhancement of fault injection techniques based on the modification of vhdl code.IEEE Transactions on VLSI, 16(6):693--706, June 2008.

Alfredo Benso et al.Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation.Kluwer Academic Publishers, 2003.

D. Borodin et al. Protective redundancy overhead reduction using instruction vulnerability factor. InCF, 2010.

R. N. Charette. This car runs on code. InIEEE Spectrum online, 2009.

Pedro Gil, et al. Fault representativeness. Technical report, DBench project, IST 2000-25425 [Online]. Available: http://www.laas.fr/DBench, 2002.

C. Hernandez et al. Live: Timely error detection in light-lockstep safety critical systems. InDAC, 2014.

Infineon. AURIX - TriCore datasheet. highly integrated and performance optimized 32-bit microcontrollers for automotive and industrial applications, 2012. http://www.infineon.com/.

International Organization for Standardization.ISO/DIS 26262. Road Vehicles--Functional Safety, 2009.

E. Jenn, et al. Fault injection into VHDL models: the mefisto tool. InFTCS, 1994.

G. Leen et al. Expanding automotive electronic systems.IEEE Computer, 35(1), 2002.

Man-Lap Li, et al. Accurate microarchitecture-level fault modeling for studying hardware faults. InHPCA, 2009.

Michail Maniatakos, et al. Instruction-level impact analysis of low-level faults in a modern microprocessor controller.IEEE Transactions on Computers, 60(9):1260--1273, 2011.

S. S. Mukherjee, et al. A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor. InMICRO, 2003.

J.-H. Oetjens, et al. Safety evaluation of automotive electronics using virtual prototypes: State of the art and research challenges. InDAC, 2014.

J. Poovey.Characterization of the EEMBC Benchmark Suite.North Carolina State University, 2007.

M. Psarakis, et al. Microprocessor software-based self-testing.Design Test of Computers, IEEE, 27(3):4--19, May 2010.

S. Rehman, et al. Reliable software for unreliable hardware: Embedded code generation aiming at reliability. InCODES+ISSS, 2011.

S. Rohr, et al. An integrated approach to automotive safety systems.SAE Automotive Engineering International magazine, September 2000.

B. Sangchoolie, et al. A study of the impact of bit-flip errors on programs compiled with different optimization levels. InEDCC, 2014.

STMicroelectronics.32-bit Power Architecture microcontroller for automotive SIL3/ASILD chassis and safety applications, 2014.

http://www.gaisler.com/cms/index.php?option=com_content&task=view&id=13&Itemid=53.Leon3 Processor.Areroflex Gaisler.

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