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The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs

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The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs

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dc.contributor.author Espinosa García, Jaime es_ES
dc.contributor.author Andrés Martínez, David de es_ES
dc.contributor.author Ruiz, Juan Carlos es_ES
dc.contributor.author Gil, Pedro es_ES
dc.date.accessioned 2016-10-03T13:03:03Z
dc.date.available 2016-10-03T13:03:03Z
dc.date.issued 2013
dc.identifier.isbn 978-3-642-38788-3
dc.identifier.issn 0302-9743
dc.identifier.uri http://hdl.handle.net/10251/70959
dc.description The final publication is available at Springer via http://dx.doi.org/10.1007/978-3-642-38789-0_7 es_ES
dc.description.abstract Current integration scales are increasing the number and types of faults that embedded systems must face. Traditional approaches focus on dealing with those transient and permanent faults that impact the state or output of systems, whereas little research has targeted those faults being logically, electrically or temporally masked -which we have named fugacious. A fast detection and precise diagnosis of faults occurrence, even if the provided service is unaffected, could be of invaluable help to determine, for instance, that systems are currently under the influence of environmental disturbances like radiation, suffering from wear-out, or being affected by an intermittent fault. Upon detection, systems may react to adapt the deployed fault tolerance mechanisms to the diagnosed problem. This paper explores these ideas evaluating challenges and requirements involved, and provides an outline of potential techniques to be applied. es_ES
dc.description.sponsorship This work has been funded by Spanish Ministry of Economy ARENES project (TIN2012-38308-C02-01)
dc.format.extent 12 es_ES
dc.language Inglés es_ES
dc.publisher Springer es_ES
dc.relation MINECO/ARENES-TIN2012-38308-C02-01 es_ES
dc.relation.ispartof Dependable Computing es_ES
dc.relation.ispartofseries Lecture Notes in Computer Science;7869
dc.rights Reserva de todos los derechos es_ES
dc.subject Fault detection es_ES
dc.subject Transient faults es_ES
dc.subject Intermittent faults es_ES
dc.subject Permanent faults es_ES
dc.subject Fault diagnosis es_ES
dc.subject VLSI design workflow es_ES
dc.subject.classification INGENIERIA DE SISTEMAS Y AUTOMATICA es_ES
dc.subject.classification ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES es_ES
dc.title The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs es_ES
dc.type Capítulo de libro es_ES
dc.type Comunicación en congreso es_ES
dc.identifier.doi 10.1007/978-3-642-38789-0_7
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Ingeniería de Sistemas y Automática - Departament d'Enginyeria de Sistemes i Automàtica es_ES
dc.description.bibliographicCitation Espinosa Garcia, J.; Andrés Martínez, DD.; Ruiz, JC.; Gil, P. (2013). The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs. En Dependable Computing. Springer. 76-87. doi:10.1007/978-3-642-38789-0_7 es_ES
dc.description.accrualMethod S es_ES
dc.relation.conferencename 14th European Workshop on Dependable Computing (EWDC 2013) es_ES
dc.relation.conferencedate May 15-16, 2013 es_ES
dc.relation.conferenceplace Coimbra, Portugal es_ES
dc.relation.publisherversion http://link.springer.com/chapter/10.1007/978-3-642-38789-0_7 es_ES
dc.description.upvformatpinicio 76 es_ES
dc.description.upvformatpfin 87 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.relation.senia 245720 es_ES
dc.contributor.funder Ministerio de Economía y Competitividad
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