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dc.contributor.author | Gómez Requena, Crispín | es_ES |
dc.contributor.author | Gómez Requena, María Engracia | es_ES |
dc.contributor.author | Sahuquillo Borrás, Julio | es_ES |
dc.date.accessioned | 2016-12-16T13:07:10Z | |
dc.date.available | 2016-12-16T13:07:10Z | |
dc.date.issued | 2015-09 | |
dc.identifier.issn | 1061-3773 | |
dc.identifier.uri | http://hdl.handle.net/10251/75304 | |
dc.description | This is the accepted version of the following article: Gómez, C., Gómez, M. E. and Sahuquillo, J. (2015), Bringing real processors to labs. Comput Appl Eng Educ, 23: 724–732. , which has been published in final form at http://dx.doi.org/10.1002/cae.21645 | es_ES |
dc.description.abstract | The architecture of current processors has experienced great changes in the last years, leading to sophisticated multithreaded multicore processors. The inherent complexity of such processors makes difficult to update processor teaching to include current commercial products, especially at lab sessions where simplistic simulators are usually used. However, instructors are forced to reduce this gap if they want to properly prepare students in this topic. Dealing with these complex concepts at labs does not only help reinforce theoretical concepts but also has a positive effect in the students motivation. This article presents amethodology designed for the study of current microprocessor mechanisms in a gradual way without overwhelming students. The methodology is based on the use of a detailed simulation framework, used both in the academia and in the industry, which accurately models features from current processors. Due to the huge simulator complexity, it is introduced through several learning phases. Qualitative and quantitative results demonstrate that students are able to develop skills in a detailed simulator in a reasonable time period and, at the same time they learn the details of complex architectural mechanisms of commercial microprocessors. | es_ES |
dc.description.sponsorship | Contract grant sponsor: Spanish Government; Contract grant number: TIN2012-38341-C04-01 | en_EN |
dc.language | Inglés | es_ES |
dc.publisher | Wiley | es_ES |
dc.relation.ispartof | Computer Applications in Engineering Education | es_ES |
dc.rights | Reserva de todos los derechos | es_ES |
dc.subject | Lab sessions | es_ES |
dc.subject | Computer architecture | es_ES |
dc.subject | Processor simulation | es_ES |
dc.subject | Multicore processors | es_ES |
dc.subject.classification | ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES | es_ES |
dc.title | Bringing Real Processorsto Labs | es_ES |
dc.type | Artículo | es_ES |
dc.identifier.doi | 10.1002/cae.21645 | |
dc.relation.projectID | info:eu-repo/grantAgreement/MINECO//TIN2012-38341-C04-01/ES/MEJORA DE LA ARQUITECTURA DE SERVIDORES, SERVICIOS Y APLICACIONES/ | es_ES |
dc.rights.accessRights | Abierto | es_ES |
dc.contributor.affiliation | Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica | es_ES |
dc.description.bibliographicCitation | Gómez Requena, C.; Gómez Requena, ME.; Sahuquillo Borrás, J. (2015). Bringing Real Processorsto Labs. Computer Applications in Engineering Education. 23(5):724-732. https://doi.org/10.1002/cae.21645 | es_ES |
dc.description.accrualMethod | S | es_ES |
dc.relation.publisherversion | http://dx.doi.org/10.1002/cae.21645 | es_ES |
dc.description.upvformatpinicio | 724 | es_ES |
dc.description.upvformatpfin | 732 | es_ES |
dc.type.version | info:eu-repo/semantics/publishedVersion | es_ES |
dc.description.volume | 23 | es_ES |
dc.description.issue | 5 | es_ES |
dc.relation.senia | 321707 | es_ES |
dc.contributor.funder | Ministerio de Economía y Competitividad | es_ES |
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