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Solving Weighted Least Squares (WLS) problems on ARM-based architectures

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Solving Weighted Least Squares (WLS) problems on ARM-based architectures

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dc.contributor.author Belloch Rodríguez, José Antonio es_ES
dc.contributor.author Bank, Balazs es_ES
dc.contributor.author Igual Peña, Francisco Daniel es_ES
dc.contributor.author Quintana Ortí, Enrique Salvador es_ES
dc.contributor.author Vidal Maciá, Antonio Manuel es_ES
dc.date.accessioned 2017-07-10T07:41:46Z
dc.date.available 2017-07-10T07:41:46Z
dc.date.issued 2017-01
dc.identifier.issn 1573-0484
dc.identifier.uri http://hdl.handle.net/10251/84798
dc.description.abstract TheWeighted Least Squares algorithm (WLS) is applied to numerous optimization problems, but requires the use of high computational resources, especially when complex arithmetic is involved. This work aims to accelerate the resolution of a WLS problem by reducing the computational cost (relaying on BLAS/LAPACK routines) and the computational precision from double to single. As a test case, we design an IIR filter for a Graphic Equalizer, where the numerical errors due to single precision are easily visualized. In addition, given the importance of low power architectures for this kind of implementations, we evaluate the performance, scalability, and energy efficiency of each method on two different processors implementing the ARMv7 architecture, widely used in current mobile devices with power constraints. Results show that the method that exhibits a high theoretical computational cost overcomes in efficiency other methods with lower theoretical cost in architectures of this type. es_ES
dc.description.sponsorship This work started in spring 2016 when Jose A. Belloch was a visiting postdoctoral researcher at Budapest University of Technology and Economics thanks to the European Network COST Action IC1305 inside the program Short Term Scientific Mission with the following reference: COST-SPASM-ECOST-STSM-IC1305-020416-072431. Dr. Jose A. Belloch is supported by GVA contract APOSTD/2016/069. The researchers from Universitat Jaume I are supported by the CICYT projects TIN2014-53495-R of MINECO and FEDER. The authors from the Universitat Politecnica de Valencia are supported by MINECO Projects TEC2015-67387-C4-1-R, PROMETEOII/2014/003 and CAPAP-H5 network TIN2014-53522-REDT. The researcher from UCM is supported by the EU (FEDER) and the Spanish MINECO, under Grants TIN 2015-65277-R and TIN2012-32180. The work of Balazs Bank was supported by the UNKP-16-4-III New National Excellence Program of the Ministry of Human Capacities, Hungary. en_EN
dc.language Inglés es_ES
dc.publisher Springer Verlag (Germany) es_ES
dc.relation.ispartof Journal of Supercomputing es_ES
dc.rights Reserva de todos los derechos es_ES
dc.subject WLS es_ES
dc.subject Audio processing es_ES
dc.subject Low power processors es_ES
dc.subject ARM Cortex es_ES
dc.subject.classification CIENCIAS DE LA COMPUTACION E INTELIGENCIA ARTIFICIAL es_ES
dc.title Solving Weighted Least Squares (WLS) problems on ARM-based architectures es_ES
dc.type Artículo es_ES
dc.identifier.doi 10.1007/s11227-016-1910-9
dc.relation.projectID info:eu-repo/grantAgreement/COST//COST-SPASM-ECOST-STSM-IC1305-020416-072431/EU/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/GVA//APOSTD%2F2016%2F069/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2014-53495-R/ES/COMPUTACION HETEROGENEA DE BAJO CONSUMO/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TEC2015-67387-C4-1-R/ES/SMART SOUND PROCESSING FOR THE DIGITAL LIVING/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2014-53522-REDT/ES/RED DE COMPUTACION DE ALTAS PRESTACIONES EN ARQUITECTURAS HETEROGENEAS (CAPAP-H5)/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2012-32180/ES/ARQUITECTURAS Y TECNOLOGIAS EMERGENTES. EFICIENCIA ENERGETICA MEDIANTE HETEROGENEIDAD/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/EMMI//UNKP-16-4-III/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/Generalitat Valenciana//PROMETEOII%2F2014%2F003/ES/COMPUTACION Y COMUNICACIONES DE ALTAS PRESTACIONES Y APLICACIONES EN INGENIERIA/ es_ES
dc.relation.projectID info:eu-repo/grantAgreement/MINECO//TIN2015-65277-R/ES/COMPUTACION HETEROGENEA EFICIENTE: DEL PROCESADOR AL DATACENTER/ es_ES
dc.rights.accessRights Abierto es_ES
dc.contributor.affiliation Universitat Politècnica de València. Instituto Universitario de Telecomunicación y Aplicaciones Multimedia - Institut Universitari de Telecomunicacions i Aplicacions Multimèdia es_ES
dc.contributor.affiliation Universitat Politècnica de València. Departamento de Sistemas Informáticos y Computación - Departament de Sistemes Informàtics i Computació es_ES
dc.contributor.affiliation Universitat Politècnica de València. Escola Tècnica Superior d'Enginyeria Informàtica es_ES
dc.description.bibliographicCitation Belloch Rodríguez, JA.; Bank, B.; Igual Peña, FD.; Quintana Ortí, ES.; Vidal Maciá, AM. (2017). Solving Weighted Least Squares (WLS) problems on ARM-based architectures. Journal of Supercomputing. 73(1):530-542. https://doi.org/10.1007/s11227-016-1910-9 es_ES
dc.description.accrualMethod S es_ES
dc.relation.publisherversion https://link.springer.com/article/10.1007/s11227-016-1910-9 es_ES
dc.description.upvformatpinicio 530 es_ES
dc.description.upvformatpfin 542 es_ES
dc.type.version info:eu-repo/semantics/publishedVersion es_ES
dc.description.volume 73 es_ES
dc.description.issue 1 es_ES
dc.relation.senia 336772 es_ES
dc.contributor.funder Ministerio de Economía y Competitividad es_ES
dc.contributor.funder European Commission es_ES
dc.contributor.funder Generalitat Valenciana es_ES
dc.contributor.funder Ministry of Human Capacities, Hungría es_ES
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