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Planificación de sistemas de tiempo real crí­tico mediante técnicas no convencionales

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Planificación de sistemas de tiempo real crí­tico mediante técnicas no convencionales

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Balbastre, P.; Aceituno, JM.; Guasque, A.; Blanes, JF.; Crespo, A.; Poza, JL. (2022). Planificación de sistemas de tiempo real crí­tico mediante técnicas no convencionales. Revista Iberoamericana de Automática e Informática industrial. 19(4):369-379. https://doi.org/10.4995/riai.2022.17148

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Título: Planificación de sistemas de tiempo real crí­tico mediante técnicas no convencionales
Otro titulo: Scheduling of hard real-time systems using non-conventional techniques
Autor: Balbastre, Patricia Aceituno, José María Guasque, Ana Blanes, Juan Francisco Crespo, Alfons Poza, José Luis
Entidad UPV: Universitat Politècnica de València. Instituto Universitario de Automática e Informática Industrial - Institut Universitari d'Automàtica i Informàtica Industrial
Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Universitat Politècnica de València. Escuela Técnica Superior de Ingenieros Industriales - Escola Tècnica Superior d'Enginyers Industrials
Fecha difusión:
Resumen:
[EN] In the scheduling of hard real time systems it is key to find a temporal plan in which tasks can be executed before the deadline expires. Different types of scheduling algorithms can be used to achieve this goal. In ...[+]


[ES] En la planificación de sistemas de tiempo real crí­tico es clave encontrar un plan temporal en el que las tareas pueden ejecutarse antes de que venza el plazo establecido. Para lograr este objetivo se pueden utilizar ...[+]
Palabras clave: Real-time control systems , Control system scheduling , Cyber physical systems , Embedded control systems , Sistemas de control de tiempo real , Sistemas de control embebidos o empotrados , Planificación y planificabilidad de sistemas de control , Sistemas ciber-físicos en control
Derechos de uso: Reconocimiento - No comercial - Compartir igual (by-nc-sa)
Fuente:
Revista Iberoamericana de Automática e Informática industrial. (issn: 1697-7912 ) (eissn: 1697-7920 )
DOI: 10.4995/riai.2022.17148
Editorial:
Universitat Politècnica de València
Versión del editor: https://doi.org/10.4995/riai.2022.17148
Código del Proyecto:
info:eu-repo/grantAgreement/AEI//PLEC2021-007609
Agradecimientos:
Esta publicacion es parte del proyecto de I+D+i PLEC2021-007609 financiado por MCIN/ AEI/10.13039/501100011033 y por “Unión Europea NextGenerationEU / PRTR”.
Tipo: Artículo

References

Baker, T. P., Shaw, A., Dec 1988. The cyclic executive model and ada. En:Proceedings. Real-Time Systems Symposium. pp. 120-129.DOI: 10.1109/REAL.1988.51108 https://doi.org/10.1109/REAL.1988.51108

Baruah, S., 2004. Feasibility analysis of preemptive real-time systems upon heterogeneous multiprocessor platforms. En: 25th IEEE International Real-Time Systems Symposium. pp. 37-46.

Baruah, S., Mar. 2022. An ILP representation of a DAG scheduling problem. Real-Time Systems 58 (1), 85-102. https://doi.org/10.1007/s11241-021-09370-7 [+]
Baker, T. P., Shaw, A., Dec 1988. The cyclic executive model and ada. En:Proceedings. Real-Time Systems Symposium. pp. 120-129.DOI: 10.1109/REAL.1988.51108 https://doi.org/10.1109/REAL.1988.51108

Baruah, S., 2004. Feasibility analysis of preemptive real-time systems upon heterogeneous multiprocessor platforms. En: 25th IEEE International Real-Time Systems Symposium. pp. 37-46.

Baruah, S., Mar. 2022. An ILP representation of a DAG scheduling problem. Real-Time Systems 58 (1), 85-102. https://doi.org/10.1007/s11241-021-09370-7

Crespo, A., Ripoll, I., Albertos, P., 1999. Reducing delays in rt control: The control action interval. IFAC Proceedings Volumes 32 (2), 8527 - 8532, 14th IFAC World Congress 1999, Beijing, Chia, 5-9 July. https://doi.org/10.1016/S1474-6670(17)57454-6

Dasari, D., Andersson, B., Nelis, V., Petters, S. M., Easwaran, A., Lee, J., 2011. Response time analysis of cots-based multicores considering the contention on the shared memory bus. In: 2011IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications. pp. 1068-1075. https://doi.org/10.1109/TrustCom.2011.146

Davis, R. I., Burns, A., Dec 2009. Priority assignment for global fixed priority pre-emptive scheduling in multiprocessor real-time systems. In: 2009 30th IEEE Real-Time Systems Symposium. pp. 398-409. https://doi.org/10.1109/RTSS.2009.31

Davis, R. I., Burns, A., Oct. 2011. A survey of hard real-time scheduling for multiprocessor systems. ACM Comput. Surv. 43 (4). https://doi.org/10.1145/1978802.1978814

Davis, R. I., Griffin, D., Bate, I., 2021. Schedulability analysis for multi-core systems accounting for resource stress and sensitivity. In: 33rd Euromicro Conference on Real-Time Systems, ECRTS 2021. https://doi.org/10.1007/s11241-022-09377-8

Di Natale, M., Zeng, H., 04 2013. An efficient formulation of the real-time feasibility region for design optimization. IEEE Transactions on Computers 62, 644-661. https://doi.org/10.1109/TC.2012.21

Fernandez, G., Abella, J., Quiñones, E., Rochange, C., Vardanega, T., Cazorla,F., 2014. Contention in multicore hardware shared resources: Understanding of the state of the art. En: WCET.

Fleming, T., Burns, A., 2015. Investigating mixed criticality cyclic executive schedule generation. En: Proc. Workshop on Mixed Criticality (WMC).

Guasque, A., Tohidi, H., Balbastre, P., Aceituno, J. M., Simo, J., Crespo, A., 2020. Integer programming techniques for static scheduling of hard realtime systems. IEEE Access 8, 170389-170403. https://doi.org/10.1109/ACCESS.2020.3024698

Gurobi, 2019. Gurobi optimizer reference manual. Inc. Gurobi Optimization.

Harter, Jr., P. K., Aug. 1987. Response times in level-structured systems. ACM Trans. Comput. Syst. 5 (3), 232-248. DOI: 10.1145/24068.24069 https://doi.org/10.1145/24068.24069

Hong, I., Kirovski, D., Gang Qu, Potkonjak, M., Srivastava, M. B., 1999. Power optimization of variable-voltage core-based systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 18 (12), 1702-1714. https://doi.org/10.1109/43.811318

Joseph, M., Pandya, P., 1986. Finding response times in a real-time system. The Computer Journal 29 (5), 390-395. DOI: 10.1093/comjnl/29.5.390 https://doi.org/10.1093/comjnl/29.5.390

Kim, H., de Niz, D., Andersson, B., Klein, M., Mutlu, O., Rajkumar, R., 2014. Bounding memory interference delay in cots-based multi-core systems. In: 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS). pp. 145-154. https://doi.org/10.1109/RTAS.2014.6925998

Lampka, K., Giannopoulou, G., Pellizzoni, R., Wu, Z., Stoimenov, N., 11 2014. A formal approach to the wcrt analysis of multicore systems with memory contention under phase-structured task sets. Real-Time Systems 50, 736-773. https://doi.org/10.1007/s11241-014-9211-y

Leung, J., Whitehead, J., 1982. On the complexity of fixed-priority schedulings of periodic, real-time tasks. Performance Evaluation 2 (4), 237-250. https://doi.org/10.1016/0166-5316(82)90024-4

Lisper, B., Mellgren, P., 10 2001. Response-time calculation and priority assignment with integer programming methods.

Liu, C. L., Layland, J. W., Jan. 1973. Scheduling algorithms for multiprogramming in a hard-real-time environment. J. ACM 20 (1), 46-61. https://doi.org/10.1145/321738.321743

Locke, C. D., Mar. 1992. Software architecture for hard real-time applications: Cyclic executives vs. fixed priority executives. Real-Time Syst. 4 (1), 37-53. DOI: 10.1007/BF00365463 https://doi.org/10.1007/BF00365463

Maiza, C., Rihani, H., Rivas, J. M., Goossens, J., Altmeyer, S., Davis, R. I., jun 2019. A survey of timing verification techniques for multi-core real-time systems. ACM Comput. Surv. 52 (3). https://doi.org/10.1145/3323212

Mangeruca, L., Baleani, M., Ferrari, A., Sangiovanni-Vincentelli, A., Dec. 2007. Uniprocessor scheduling under precedence constraints for embedded systems design. ACM Trans. Embed. Comput. Syst. 7 (1). https://doi.org/10.1145/1324969.1324975

Nguyen, V. A., Hardy, D., Puaut, I., 2019. Cache-conscious off-line real-time scheduling for multi-core platforms: algorithms and implementation. Real-Time Systems 55 (4), 810-849.DOI: 10.1007/s11241-019-09333-z https://doi.org/10.1007/s11241-019-09333-z

Sun, Y., Natale, M. D., Sep. 2017. Weakly hard schedulability analysis for fixed priority scheduling of periodic real-time tasks. ACM Trans. Embed. Comput. Syst. 16 (5s). DOI: 10.1145/3126497 https://doi.org/10.1145/3126497

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